Gorilla and King Portfolio Candidates Message Board

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Strategies & Market Trends : Gorilla and King Portfolio Candidates

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next

To: Eric Jacobson who wrote (17684)	2/10/2000 7:09:00 PM
From: Uncle Frank	Read Replies (1) of 54805

>> Theoretically, 3 inch SiC wafers can more than double the number of chips per wafer over existing 2 inch technology. This is expected to significantly reduce the cost of devices made from SiC and has the potential to enable the company to increase volume to meet the high demand for its products. A 3" wafer has 2.25 times the surface area of a 2" wafer. Provided yield levels are maintained, which is largely a function of frequency of occurrence of crystal lattice defects, you could realize a 125% increase in throughput. uf

Report TOU Violation

Share This Post

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next