Yo_Zeev and all "BU$$ER$".........
Looks like we are beginning to see a positive turn in RAMBU$ news stories:
bigcharts.com
Rambus to rivals: you need us -- Tells DRAM alliance that its help is critical to group's success
SATURDAY, FEBRUARY 12, 2000 12:46 AM
- CMP Media
Feb. 11, 2000 (Electronic Buyers News - CMP via COMTEX) -- Rambus Inc. has thrown down the gauntlet to the Advanced DRAM Technology (ADT) alliance, claiming that the group's efforts to develop a new PC main-memory architecture will not succeed without Rambus' input.
Created earlier this year at the urging of Intel Corp., the alliance hopes to field a low-cost PC main memory for the 2003 market. While a number of leading DRAM vendors were asked to join the committee, Rambus, whose Direct Rambus DRAM architecture is now making its way into high-end PCs, did not receive an invitation.
That fact doesn't concern Avo Kanadjian, newly appointed vice president of worldwide marketing at Mountain View, Calif.-based Rambus. "When ADT is done analyzing their DRAM requirements, they will be looking at a Rambus-compatible device. They'll need our participation," Kanadjian said.
The two sides certainly appear to have similar target markets. The ADT alliance, which consists of Hyundai MicroElectronics, Infineon Technologies, Intel, Micron Technology, NEC, and Samsung Electronics, stated previously that it's focusing on high-volume, low-cost PCs and handheld information appliances. Among other things, Rambus is aiming at a new generation of sub-$200 sealed PCs that Samsung is promoting.
Kanadjian said the basic requirements of the next DRAM design can already be ascertained. "You will need a very high-speed, narrow bandwidth, point-to-point memory-to-processor connection, and very few memory chips. That's the Rambus model, and ADT is going to be driven to much the same design."
Asked how Rambus would reconcile its proprietary, royalty-based business model with the ADT's insistence on a royalty-free, open architecture, Kanadjian said, "There must be some accommodation [by ADT] with the Rambus business model or a derivative of that model."
In any event, Rambus hopes to sew up the memory market for handheld Internet-enabled devices and sealed PCs before the ADT chip gets into silicon. Kanadjian said the ADT DRAM won't be ready until 2003, while he expects Direct RDRAM to make a heavy penetration into the volume low-cost computing market starting this year.
Kanadjian agreed that the high initial production costs of Rambus memory could raise eyebrows given the company's emphasis on value-end computing platforms. However, he maintained that as Direct Rambus ramps, prices will fall sharply and become highly competitive with mainstream SDRAM.
To date, three chip makers-NEC, Samsung, and Toshiba-are shipping limited quantities of validated Direct RDRAM, with Samsung the only company to have fielded an 800-MHz part. By the fourth quarter, Kanadjian said Direct RDRAM will be available from six suppliers.
He also claimed that Direct RDRAM has a big advantage over SDRAM in point-to-point memory applications for value-line products. "Because of Direct Rambus' much faster speed and narrow bus width, it takes half as many chips as SDRAMs to get the same memory size," he said.
The Rambus executive reiterated that only two 256-Mbit Rambus chips are needed to deliver a total memory capacity of 64 Mbytes, compared with four 256-Mbit SDRAMs.
Additionally, Kanadjian disclosed for the first time that an initiative to design a more austere and potentially cheaper Direct Rambus chip has been scrapped. Intel and Rambus last fall had formed an industry RDRAM Implementors Forum to consider reducing the number of memory banks in the chip from the current 32 banks to eight or 16.
However, Kanadjian said it's better to have a single Direct Rambus architecture to achieve the largest economies of scale possible. "You lose production economies if you try to make too many different device types," he said.
Rambus DRAM cost-reduction efforts have not been abandoned altogether. Toshiba Corp. last week at the International Solid-State Circuits Conference in San Francisco described a new Rambus architecture for a 256/288-Mbit chip. The device uses four 72-Mbit quadrants and shares data transmission among all banks, requiring less logic circuitry for memory control. In turn, this allows a 131-sq.-mm die, 8% smaller than existing designs. Current RDRAM die consumes about 20% more silicon real estate, primarily for logic functions. A Toshiba spokesperson said the smaller die will provide a significant cost savings.
ebnonline.com;
Salude - Norman.
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