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Politics : Formerly About Advanced Micro Devices

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To: Scumbria who wrote (92861)	2/13/2000 11:11:00 AM
From: Dan3	Read Replies (1) of 1574216

Re: 8 times as many addresses can fit into the same cache index.... Thanks for your correction of my post. I had understood the increase in set associativity allowed for more addresses to be maintained in a given set, not that there were more indexes available. e.g. a 2-way would have greater granularity but less depth. This led to my expectation that a 16-way would keep track of more addresses with the same least significant bits (that would be overwritten in the 2-way cache), while failing to maintain as many bytes of each sequential access. The net result would be that the 16-way and 2-way would, after repeated accesses to each set of low order addresses, be left with limited overlap of cached locations. I'm guess I'm still a bit confused, if a 128K 16-way and 2-way cache don't behave identically, why, after an extended period of repeated accesses to each region of memory, would they both be left with the same set of addressed in cache? (so that the there would be 100% duplication of the L1 in the L2) Thanks for your post, Dan

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