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Politics : Formerly About Advanced Micro Devices
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To: milo_morai who wrote (93409)2/15/2000 11:14:00 PM
From: Jim McMannis  Read Replies (1) of 1574573
 
RE:"Dr. Yu refused to say how much on-die cache was on the processor he introduced today"

Perhaps because there was no L2?
I remember how high those cacheless Celerons (Paulerons} could scale.
Hummm. ANy idea how high a cachless Athlon will scale?

RE:"However, he did say it was unlikely that when Willamette launches on the 1st October or thereabouts, it would reach such 1.5GHz speeds. He said: "It's unlikely it will launch at that speed. This is a very first raw look at the silicon."

Adding L2 might just slow it down? <G>

Jim
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