Well, it finally happened! My sources kept telling me this was happening for a long time now and Intel kept denying it. (What do you say Tench?)
Rambus got pumped for the the first couple of days and the dump begins tomorrow.
This is a solid technology company that is suffering from gross technology mis-managment from Intel. Feel sorry for the folks who bought-in in the last couple of days.
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ebnews.com
Intel's Timna CPU to support SDRAM, while Willamette adopts Rambus interface
By Jack Robertson
Electronic Buyers' News
(02/15/00, 07:07:55 PM EDT)
Intel Corp. today confirmed that its new Timna integrated processor for the sub-$500 PC market initially will only support SDRAM memory.
Pete MacWilliams, an Intel fellow and director of platform architecture for the company, said that Timna will not support a Direct Rambus DRAM interface as was originally intended. Rather, Intel has decided that a Timna follow-on, to be introduced next year under a different brand, will connect to the high-speed Direct RDRAM memory interface.
Speaking shortly before delivering a technical session today at the Intel Developer Forum in Palm Springs, Calif., MacWilliams said Intel made the switch because of uncertainty surrounding the immediacy of large Direct RDRAM supplies, which would be needed to support a high volume processor like Timna. He added that the Rambus-memory supply picture should be sufficiently evolved in 2001 to allow Intel to include the architecture in its as yet unnamed successor to Timna.
McWilliams also confirmed reports that the upcoming next-generation Willamette processor and its accompanying Tehama chipset will only support Direct Rambus memory. He said Willamette and Tehama will have a dual-channel Direct RDRAM interface, building from an existing technique used in the Intel 840 chipset.
MacWilliams said Intel will upgrade its entire chipset line this year by adding a new ICH-2 I/O controller hub that essentially upgrades the South Bridge with a new ATA-100 interface.
MacWilliams demurred when asked if Willamette motherboards will use six layers, saying "For the desktop market our intention is to have a four-layer board, but initially this may not be the case."
Intel also confirmed that it is co-developing a double-data-rate SDRAM-enabled chipset with ServerWorks, Santa Clara, Calif. (formerly Reliance Computer Corp.), and expects to have the device available for servers in the first half of 2001. MacWilliams said, however, that the partners will roll out only a 200-MHz version of PC100 DDR SDRAM, adding that double-clocked PC133 chips "have too many unsolved timing issues at present. We want to work out all the issues on 200-MHz DDR memory before trying to tackle even faster speeds," he said |
