For future reference - Silicon (DSP) manufacturing and Chip architecture
Texas Instruments' DSP (Digital Signal Processor):
1980-1990
Circuit line widths were reduced 3x from 3 microns to 0.8 micron.
Processing speed went up 8x from 5 MIPS to 40 MIPS. (MIPS = million of instructions per second)
Power consumption went down 20x from 250 milliwats per MIPS to 12.5 milliwats per MIPS
Unit price went down 10x from $150 to $15.
1990-2000
Circuit line widths went down 4x from 0.8 micron to 0.18 micron.
Procesing speed went up 50x from 40 MIPS to 2000 MIPS.
Power consumption went down by 10x from 12.5 milliwats per MIPS to 0.1 milliwat per MIPS.
Unit price went down 10x from $15 to $1.50.
2010 forecast - dozens of DSPs each with 500 million transistors on a single chip.
Moore's dynamic:
6" wafer - 0.18 micron process = 506 chips per wafer
8" wafer = 0.15 micron process = 976 chips per wafer
12" wafer = 0.11 micron process = 2500 chips per wafer
Cost of a fab
TXN's DMOS6 fab in Dallas -- roughly the size of 3 football fields -- is expected to cost $2.2 billion.
Power consumption:
10x reduction in power consumption every 24 months.
.....But silicon manufacturing isn't the whole story when it comes to the value we bring to the communications market. A second key element is chip architecture.
We've talked a lot about the digital signal processor today. But product engineers actually have a number of different silicon options available to them when they start to design their solutions.
Option 1 is the ASIC chip. It offers advantages such as small size, low manufacturing cost, and low power dissipation. But ASIC solutions are hardwired solutions. They're developed for a specific purpose and only that purpose. As a result, they cost a lot to develop, they take a long time to get off the drawing boards, and their downstream flexibility is limited.
Option 2 is the programmable chip. As the name suggests, these chips get much of their functionality from on-chip software. Because they're programmable, these chips can shorten the time-to-market for equipment makers and that, in turns decreases their development costs and maximizes their downstream flexibility.
But a programmable solution can also create high system costs, because you can wind up with a lot of 'stand-alone' solutions from one manufacturer to another.
Option 3 is to work with a combination of powerful, programmable chips and 'building block' software elements. This approach offers the same 'time-to-market' advantages as the programmable solution but it can significantly reduce system costs.
One of the greatest advantages of the combination solution is that it can lead to incredible innovation. Why? Because with 'building block' software, product developers don't have to start from scratch for each new generation of products or features. Basic portions of the on-chip code the operating system, and so on can be reused.
What's more, hundreds or thousands of third-party developers can write programs that follow certain rules of the road allowing them to provide off-the-shelf solutions that other product developers can simply plug into their next generation product concepts.
The bottom line: Combination solutions allow developers to spend less time re-inventing the wheel and more time creating the innovations that add real value for their customers....
ti.com
From IDC's 3/31/99 10K
InterDigital has entered into an agreement with Texas Instruments, Inc. to manufacture InterDigital's new integrated chip based on InterDigital's B-CDMA technology. InterDigital anticipates that, in the future, such chips may be marketed and sold to differing markets by either Texas Instruments or by InterDigital.
From 2/11/2000 IDC earnings release:
InterDigital and its partners successfully demonstrated wideband CDMA technology in fixed wireless products in field trials in five countries.
System-on-a-Chip ASIC for fixed wireless applications, employing wideband CDMA air-interface technology, produced with Texas Instruments. Successful tests validated high performance of InterDigital's proprietary wideband CDMA air interface and systems designs - many portions of which are reusable in developing new 3G technologies.
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