Four issues dictate Bluetooth design
November 29, 1999, Issue: 1089
Section: Communications -- Focus: Home Wireless LANs
By Aliwella, Bluetooth Program Manager, Mitel Semiconductor, Lincoln, U.K., Jim Wight, Senior Radio Architect, Cedric Paillard, Bluetooth Product Marketing Manager, Philsar Electronics, Nepean, Ont.
The Bluetooth radio uses the 2.4- to 2.5-GHz unlicensed ISM (industrial-scientific-medical) band. The global availability of the frequency range, along with the lack of licensing procedures, is expected to open the door to fast product introductions.
To maintain signal integrity as increased voice and data traffic is transferred over the allocated frequency band, Bluetooth-based silicon must integrate functionality to enhance the system's immunity to interference. The standard addresses the interference issues by specifying a frequency-hopping spread-spectrum radio, together with a fast channel-hopping rate. The system is configured to transfer voice and data at a raw 1-Mbit/s data rate, over distances of less than a meter to several tens of meters, depending on the requirements of the end application. The configuration of a Bluetooth system is highly adaptable, allowing a Bluetooth unit to simultaneously act as a master in one piconet and as a slave in a second piconet. Early products will focus on point-to-point connectivity because of the current focus on mobile phone applications.
There are four key issues to ensure that Bluetooth-enabled products are rapidly accepted in the volume marketplace. They include a high level of integration; very low power consumption; support for both multipoint and piconet-to-piconet connectivity; and ease of integration into an end-user application. Those key issues can be addressed by a top-down approach that looks at the entire system from the beginning of product development.
In designing the front end of a Bluetooth system, it is important to use a highly integrated radio with a voltage supply as low as 1.8 V. The low-voltage supply reduces dc power consumption, allowing longer battery life and therefore greater autonomy for the Bluetooth user. To ease the integration into existing end-user systems, it is important to minimize off-chip component count. To increase the level of integration, designers can employ circuit realizations such as complex channel filters, complex phase-locked loops (PLLs), and delta-sigma fractional N-based, two-point, angle-modulated frequency synthesizers. As opposed to most available solutions, integrating the voltage-controlled oscillator (VCO), synthesizer, power amplifier and intermediate frequency (IF) filters can greatly reduce overall system cost.
By integrating all radio functionality onto a single chip, designers can achieve ultra low-power operation below 20 mW in receive mode at 1.8 V. One example of a highly integrated radio solution is Philsar's PH2401, which also includes a programmable transmit power control feature that enables transmission of only as much power as is absolutely required for a given application. That helps to maintain battery life and further extend user autonomy. Using a 0.5-micron silicon geranium BiCMOS process technology enables high performance of the receiver solution. The receiver provides -84 dBm of sensitivity for a bit error rate (BER) of 0.1 percent; the transmitter provides output power of 0 dBm from a supply of 1.8 V. The frequency synthesizer lock time is under 100 microseconds from a deactivated state and is used to provide two-point modulation for two-level FSK transmit data.
Baseband interface
The receiver interfaces directly to a baseband controller, such as Mitel Semiconductor's MT1020A, which consists of the company's Firefly embedded microcontroller core and the Bluetooth baseband peripheral (BBP) block, as well as the audio codec, program memory,
a general-purpose analog-to-digital converter, and Universal Serial Bus (USB) and UART
host interfaces.
System architecture can be designed for ultra low-power applications by using five strategies: minimizing the processor overhead, which allows clock speeds to be reduced to as low as 5 MHz; using a dedicated Bluetooth bus for data packet DMA transfers; system partitioning that decodes Bluetooth packets in hardware; an operating internal core with a minimum 1.8 V supply; and a low-power codec for voice applications.
The BBP subsystem performs all time-critical Bluetooth operations with the aim of making the baseband software non-time-critical. That also reduces the processor overhead to ensure that there is an easy route for embedded applications of the Bluetooth standard.
Essentially, the BBP is connected to the Firefly processor core through a bus interface block. That provides a degree of isolation between the processor bus and the BBP bus to ensure that the Bluetooth baseband peripheral bus can be clocked at a low rate for power reduction, while the processor may be clocked at a higher rate for greater processing power in embedded applications.
The isolation of the BBP bus also allows the buffer management block within the BBP to perform intelligent DMA transfers between a dedicated Bluetooth data buffer RAM and the Bluetooth link controller or the host controller interface (HCI) block, which can use USB or UART transport. The buffer management block can also provide data transfer for the voice interface. The DMA transfers within the BBP do not use cycles on the processor bus, because of the bus interface block, so the processor is capable of full processing speed while data is transferred between the HCI interface and the radio.
The Bluetooth link controller block of the BBP controls the radio transceiver and provides all of the necessary mechanisms to packetize and depacketize the radio data. The block has hardware capabilities to strip or assemble the preamble, sync words and headers. It will also calculate and verify data protection over the medium using CRC error detection and forward error correction. If encryption is required, the encryption block will support keys of up to 128 bits. The Bluetooth standard defines packets as an access code, a header and a payload. The access code is used for synchronization, identification and dc offset compensation. The header provides link control information such as active member address, packet type, data flow control, packet acknowledge indication, packet sequence number and error checking. The link controller hardware is aware of those fields and maintains link information so that many of the fields are automatically handled.
In addition to this low-level formatting of the radio packets, the link controller block has built-in receive and transmit sequences that will control timing, hop selection and the necessary control of the radio. That allows packets to be transmitted and received in accordance with the Bluetooth specification. The link controller will follow a configurable time division of synchronous connection-oriented (SCO) and asynchronous connectionless (ACL) links automatically, without processor intervention. The SCO links reserve time slots and can be considered to be a circuit-switched connection, which makes them ideally suited to time-bounded services such as voice. The link controller can also be configured to operate in paging or inquiry modes, which allow other Bluetooth units to be located. The maintenance of the Bluetooth clock and its use to derive hop sequences and transmit receive timings is also handled by the link controller hardware.
The baseband protocol stack resides in on-chip ROM. The software complies with the Bluetooth specification Version 1.0, and implements the link controller, the link manager and the host controller interface.
Alternatively, the on-chip ROM can be disabled, allowing the baseband firmware to be located in an external memory device such as a flash ROM. That allows the baseband firmware to be customized to suit specific requirements, such as the addition of application software in order to realize a single-CPU Bluetooth system. The Bluetooth standard will continue to evolve as developers access its benefits.
Copyright © 1999 CMP Media Inc. |
