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Politics : Formerly About Advanced Micro Devices

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To: Tenchusatsu who wrote (96250)	3/2/2000 4:04:00 AM
From: Joe NYC	Read Replies (1) of 1576915

Tench. Harsh Sharangpani at MPR last year said that a common misconception of Itanium is that it will be a completely static architecture. Instead, Itanium will allow some out-of-order execution, with a register scoreboard at the end to retire instructions in-order. Harsh called it "the right level of smarts." This allows other non-dependent instructions to execute while one is waiting on a load or doing something else. Does this mean that the processor will be able to unpack the individual instructions from the group of 3 and execute them, or that it will put this 3 instruction group on hold, and try to execute another one out of order? Joe

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