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Technology Stocks : Son of SAN - Storage Networking Technologies

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To: Douglas Nordgren who wrote (1895)3/19/2000 1:29:00 PM
From: J Fieb  Read Replies (2) of 4808
 
How come these guys didn't jump on the I-band?

Note one company mentioned here Seagull gave a talk at the I-band conference and plans on making I-band ASICs too.

Motorola throws switch on fast I/O
David Lieberman and David Lammers

CHICAGO - A new switched-fabric interconnect called RapidIO emerged at the Embedded Systems Conference here last week. Jointly developed by Mercury Computer Systems Inc. and the Somerset design center of Motorola Semiconductor Products Sector's Networking and Computer Systems Group, RapidIO rolled out with an impressive slate of supporters, who will join in a trade group (www.RapidIO.org) being formed to shepherd the spec.

The RapidIO boosters were quick to differentiate their spec from the InfiniBand switched I/O specification being developed by a group including major computer server makers and Intel Corp. They labeled InfiniBand a box-to-box and rack-to-rack interconnect that's complementary to RapidIO, which will fit in chip-to-chip and board-to-board scenarios.

Still, some noted the potential for confusion as the two switched-fabric architectures come to market, and others said the waters could be further muddied as other switched-fabric schemes come to light.
RapidIO is intended to be an open standard that would be used both as a processor bus and as an intrasystem backplane interconnect for networking equipment. The double-barreled approach is intended to provide a faster interconnect for ICs and boards and to minimize the need for bridge chips to link boards using either PCI or a proprietary interconnect.

The approach has the backing of some of the largest networking vendors, including Cisco Systems, Lucent Technologies and Nortel Networks. Other backers include semiconductor companies Tundra, Seagull and Xilinx, as well as HAL Computer Systems Inc. and Galileo Technology.

"We at Cisco see RapidIO as a chip-to-chip and potentially a point-to-point, board-to-board interconnect," said John Wakerly, vice president of engineering at the enterprise-WAN business unit of Cisco Systems, and also an InfiniBand backer. "InfiniBand is a system-area interconnect, appropriate for board-to-board and box-to-box intercon- nect, perhaps in a data center. There's a little overlap in the applicability of the two standards in the middle ground [board-to-board], but that's natural."

One source, who requested anonymity, pointed to the political angle on RapidIO. "Motorola doesn't have an answer to InfiniBand. If they adopted it, they'd have to redesign their cache controller to put an [InfiniBand] host control adapter in there," he said.

Preaching to converted

"Switched-fabric technology is going mainstream, and the RapidIO architecture is the next obvious step," said Craig Lund, chief technology officer at Mercury (Chelmsford, Mass.). Mercury has been the most successful of the switched-fabric vendors in gaining support for its vehicles: RACEway and RACE++.

Motorola (Austin, Texas), Mercury "and a lot of others" have been working independently on high-speed interconnects, said Richard Jaenicke, director of product marketing at Mercury, and when the two companies started talking, "we realized that unless we did something together to pull the industry toward a common solution, we'd end up with a fragmented state of interconnects."

PCI has "run out of gas for the networking market," said Dan Bouvier, a Somerset system architecture manager who led the technical effort for Motorola. "Everybody was complaining about it. We [Motorola and Mercury] put our heads together in the summer of '98 and danced around with our ideas. We distributed the specs [to networking companies], got feedback, made several revisions and put the final wraps on it late last year."

Motorola plans to push the architecture into networking equipment. Mercury will push RapidIO into the broader embedded-computing market, with military applications and medical imaging likely targets.

Rambus lookalike?

RapidIO uses one 8- or 16-bit channel to send clock and data signals and another channel to receive an incoming packet. In that sense, it resembles the Rambus interconnect technology, which uses a 16-bit channel at 400 MHz to send and receive packets of clock and signal data.

Though the RapidIO camp downplays any comparisons to Rambus, in late 1999 Rambus Inc. announced a reorganization intended in part to step up the adoption of Rambus technology in the networking market. That announcement may have galvanized the RapidIO consortium.

Sam Fuller, manager of system architecture and product planning at Motorola's Somerset design center, said RapidIO members will have free access to the technology and are called upon to license patents to other members in a "fair and reasonable" manner. Rambus' business model involves both licensing and per-chip royalty fees.

One Motorola spokesman noted that the Rambus physical interface could be supported within RapidIO's physical layer.

RapidIO is based on low-voltage differential (LVDS) signaling technology, and its initial implementation will be 8-bit parallel, running off a 250-MHz source-synchronized clock. But "the spec leaves room for wider and narrower data paths and higher frequencies," Mercury's Jaenicke said.

Clocking in the spec is double-edged, passing data on both the rising and falling edges of a waveform to yield an effective 2x (500-MHz) data rate. Full-duplex operation, said Jaenicke, yields an effective 1 GHz.

RapidIO was designed as a single-ended termination bus. The architects paid attention to error correction, with recovery ensured from single-bit errors and from multibit errors in most cases, Motorola's Bouvier said.

Sources unanimously declared that InfiniBand is an excellent interconnect for hooking big-iron servers to RAID subsystems, for example; that RapidIO is a great intracrate interconnect; and that each solves a distinct class of problems. "They both have the same basic switched-fabric concept, but they are different in significant ways," said Joe Pavlat, director of strategic programs at Motorola Computer Group (Tempe, Ariz.).

"InifiniBand is kind of loose and not very deterministic: You send out a message, and sometime later it gets to its destination," he said. "RapidIO is much more tightly coupled, so you can hang lots of processors off it. You can build very big and powerful multiprocessor architectures that are very deterministic."


"They're different classes of interconnects," said Rick O'Connor, vice president at Tundra Semiconductor Corp. (Kanata, Ont.). "InfiniBand is a shared-nothing, very protected, independent domain with a lot of security wrapped around the data; there's a lot of overhead. RapidIO is literally just message passing in a memory-mapped environment with the same load-store programming model people are used to with standard buses."

InifiniBand's overhead "would make it very kludgey inside a box," said Ray Alderman, executive director of the VMEbus International Trade Association (Scottsdale, Ariz.), "whereas RapidIO has done a sound job of tuning things" for low latency.

Also, said Tundra's O'Connor, "It's in an open forum, so [the technology] can be adopted by other vendors, and it's going to show up on the microprocessors. No other fabric has all three of those going for it."

Mercury's Jaenicke said RapidIO "can fit in a single FPGA with room left for the other side of the interface, or in a small corner of some other chip-an ASIC or microprocessor."

One goal of the trade group will be to ensure that network equipment vendors, rather than silicon suppliers, keep control of the standard, said Motorola's Fuller. Today's networking systems are needlessly expensive, he said, because bridge ASICs or FPGAs must be created to link boards. "That is wasted time. If the chips and boards use the same interconnect structure, we can grow the [networking] market faster."

RapidIO is intended eventually to reside directly on processors, such as the PowerPC-based PowerQuicc controllers, or DSPs based on StarCore. By establishing a director processor-to-memory link without going through a north-bridge core logic chip, latency can be reduced.

"For the very latest technology, it may take 100 processor cycles to get the data back from the memory," said Fuller. "We can save, for example, 20 cycles by integrating RapidIO. And then you don't have to arbitrate over a relatively slow 68x bus."

Bouvier of Motorola said the RapidIO interconnect would form the processor bus for a range of future communications-centric PowerPC, PowerQuicc and Motorola DSPs, including the C-Port network processor the company plans to acquire. He would not say when the first Moto products using the bus might appear.

Pavlat said RapidIO would be a "powerful interconnect for arrays of traditional DSPs."

For more than a year, Tundra, which recently licensed Compaq's PCI-X technology, has been flogging the concept of switched PCI, wherein one or more PCI buses meet in a switch to some switched-fabric architecture. "The missing piece has been a fabric with a protocol that's scalable, flexible and robust enough to deliver all kinds of I/O," said O'Connor. "RapidIO is the right piece because it's going to show up on processors from Motorola and other vendors." He declined to speculate on who those vendors might be.

Donald Barry, president of Mercury competitor Sky Computers (Chelsmford, Mass.), said that RapidIO "takes packet-switch technology to the next performance level by incorporating the most recent LVDS technology as the transport mechanism. It will be a natural growth path for Sky to interface to RapidIO from our existing Skychannel technology."

RapidIO will likely show up on communications companies' custom cables and backplanes, sources said, as well as on yet-to-be-defined parts of the backplane connectors for VMEbus and CompactPCI.

"In the next six months, you're going to see at least another four or five announcements of switched fabrics," said one source. TI, for example, is said to be working on a PCI-to-LVDS interface chip capable of 2-Gbit/second operation; Myricom, whose Myrinet interconnect Intel used to prove out Next Generation I/O, is said to be working on a serial version. Some sources also pointed to the recent investment of PCI power PLX in high-speed interconnect specialist Sebring Systems as perhaps presaging a source of a new fabric. Others noted the switched-fabric activity at Advanced Micro Devices and at Hewlett-Packard.

And, said the anonymous source, "it wouldn't surprise me to see Intel come out with something for inside the box."

-Additional reporting by Rick Merritt.

eetimes.com

Copyright © 2000 CMP Media Inc.

Comments anyone? Switched fabrics seem to be needed everywhere. ANCRs intellectual capital seems increasingly valuable.
MOT needs Rapid I/O cause they can't implement I-band?
Need some discussion on Switched fabrics and DSPs. Most DSPs are in cell phones? Where would a switched fabric DSP
be needed? Thanks in advance for any help.
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