SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: brushwud who wrote (99526)3/23/2000 3:24:00 AM
From: Charles R  Read Replies (2) of 1571200
 
<"On the Celerons, however, Intel is disabling half of the cache and likely running it at a slower speed, so the chip can only take advantage of 128KB of the cache."

What is the sensible reason for disabling half the cache? Demand is good?>

I have commented on this a few times. There are a lot of advantages for Intel to go with a single die strategy for the time being. See:

Message 12875594

That should also explain why you will see higher speed Celerons shortly and also explains why K6-2 didn't have a chance on the desktop side.

Intel could have taken a whole bunch of momentum from AMD at the low-end had the 600MHz Celeron showed up in February as rumored but it did not. Now, Spitfire is imminent and could be positioned against PIII in speed grades and performance.

In the interim AMD can downbin current Athlons or sell a few "limited edition" K6-2s to compete in the 600MHz space and still make good money.

Assuming AMD can successfully pull off this transition in Q2, Q2-Q4 will be phenomenal quarters.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext