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Politics : Formerly About Advanced Micro Devices
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To: milo_morai who wrote (100343)3/27/2000 11:09:00 PM
From: Tenchusatsu  Read Replies (1) of 1573434
 
Milo, <Paul it has 64k L2 enabled and another 64k that can be turned on via BIOS is what I read on Ace's I believe. I believe this is done for a greater yield.>

I doubt it. On a 0.18u process, the difference between 64K and 128K of L2 cache is only about 8 to 10 mm2. That's almost negligible compared to a core size of about 103 mm2.

I'm pretty sure that AMD will make sure Spitfire has enough cache to make it faster clock-for-clock than Celeron at the very least. Spitfire can't compete against Celeron in pure cost (both CPU and platform), but AMD can market the MHz and per-clock performance advantage. That should make Spitfire an interesting competitor in the low-end until Timna shows up.

Tenchusatsu
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