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Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 95.26+3.1%Nov 14 9:30 AM EST

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To: Orion who wrote (39040)3/29/2000 7:43:00 PM
From: Jdaasoc  Read Replies (1) of 93625
 
Orion:
Dates on RMBS patents in Hitachi suits. I put all the dates in to see how Hitachi's claim is regarding claim of patenting JEDEC designs. Everything seems to hinge on P/N 5,319,755 from 1994. It is referenced by 49 other patents on file.

5,915,105 "Integrated circuit I/O using a high performance bus interface"

Filed: Nov 26,1997 Awarded Jun 22, 99

This is a continuation of application Ser. No. 08/762,139, filed Dec. 9, 1996, now U.S. Pat. No. 5,809,263, which is a continuation of application Ser. No. 08/607,780, filed Feb. 27, 1996, now abandoned, which is a continuation of application Ser. No. 08/222,646, filed Mar. 31, 1994, which has issued as U.S. Pat. No. 5,513,327, which is a continuation of application Ser. No. 07/954,945, filed Sep. 30, 1992, which has issued as U.S. Pat. No. 5,319,755, which is a continuation of application Ser. No. 07/510,898, filed Apr. 18, 1990, now abandoned.

5,953,263 Synchronous memory device having a programmable register and method of controlling same"

Filed: Nov 20, 98 Awarded: Sep 14, 99

This application is a continuation of Ser. No. 08/798,520 filed Feb. 10, 1997, now U.S. Pat. No. 5,841,580.

5,954,804 "Synchronous memory device having an internal register "

Filed: Feb 10 97 Awarded: Sep 21, 99

This application is a divisional of application Ser. No. 08/710,574, filed Sep. 19, 1996, now abandoned, which is a continuation of application Ser. No. 08/469,490 filed Jun. 6, 1995, now abandoned, which is a continuation of application Ser. No. 07/847,961 filed Mar. 5, 1992, now abandoned, which is a divisional of application Ser. No. 07/510,898 filed Apr. 18, 1990 now abandoned.

5,995,443 "Synchronous memory device"

Filed:Mar 4, 99 Awarded: Nov 30,99

This application is a continuation of application Ser. No. 09/196,199, filed on Nov. 20, 1998 (still pending), which is a continuation of application Ser. No. 08/798,520, filed on Feb. 10, 1997 (now U.S. Pat. No. 5,841,580), which is a division of application Ser. No. 08/448,657, filed May 24, 1995 (now U.S. Pat. No. 5,638,334), which is a division of application Ser. No. 08/222,646, filed on Mar. 31, 1994 (now U.S. Pat. No. 5,513,327); which is a continuation of application Ser. No. 07/954,945, filed on Sep. 30, 1992 (now U.S. Pat. No. 5,319,755), which is a continuation of application Ser. No. 07/510,898, filed on Apr. 18, 1990 (now abandoned).

5,319,755
Integrated circuit I/O using high performance bus interface

Abstract
An apparatus for storing and retrieving data is described. The apparatus includes a circuitry for initiating data transmission, a first memory, a second memory, and a multiline bus for transferring control information, addresses, and the data. The control information includes information for selecting one of the first and second memories without using any separate memory select line. Configuration circuitry is provided for assigning a first identification value to the first memory and a second identification value to the second memory. The configuration circuitry includes a first reset line for coupling the circuitry for initiating data transmission to the first memory, a second reset line for coupling the first memory to the second memory, a first identification register for the first memory, a second identification register for the second memory, circuitry for generating a first reset signal and a second reset signal and for sending the first and second reset signals to the first identification register, circuitry for propagating the first and second reset signals from the first identification register to the second identification register, circuitry for resetting the first and second identification registers in response to the first reset signal, and circuitry for setting the first identification register to the first identification value and the second identification register to the second identification value in response to the second reset signal.

Inventors: Farmwald; Michael (Berkeley, CA); Horowitz; Mark (Palo Alto, CA)
Assignee: Rambus, Inc. (Mountain View, CA)
Appl. No.: 954945
Filed: September 30, 1992 Awarded: June 7, 94
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