Hi Scumbria; About those DRDRAM transistors... I don't think that RDRAM requires faster transistors, that would be quite a difficult feat. In fact, RDRAM used 2.5V while the rest of the world was at 3.3V. Since propagation delays in CMOS scales inversely proportional to voltage (with all other variables, particularly process held constant), that would suggest that RDRAM's transistors were 33% slower than other standard DRAM at the time. This is basically a fact that doesn't matter much, as far as the bus interface goes, I would guess that the average FET has a low enough on resistance to make the design work. Where they would run into problems is in the spread of the process. RDRAM has got to require a relatively tight process.
As far as sources goes, I have seen this mentioned in the trade press repeatedly, but you aren't going to see Samsung issue an official press release saying that their process isn't good enough to reliably produce RDRAM with a high yield. (If you did see it, it would be in the justification of an official decision to drop manufacturing the part.) What the memory makers were leaking was that if they converted to RDRAM, their standard process would have a good yield, but as soon as their process got a little off, they had to throw away a batch. Regular memories aren't as sensitive to process, so they can sell them a lot cheaper. This is all in addition to the die penalty, which in itself is a non-linear cost increaser.
It basically boils down to the same thing that faced the motherboard and RIMM makers. They had to tighten their tolerances in order to get the repeatability required to control impedances to the specifications required.
Same thing happened to the Camino chipset, no doubt. Tight tolerances reduce manufacturability. On the few occasions I have had to make PCBs (for my own projects), I've always been careful to use spaces and traces 50% larger than the PCB house claimed their process could achieve. That way I ended up with boards that didn't need testing. (And so are cheaper.)
Rambus really didn't provide an advance on PC memory technology. Everybody already knew that if all the components were perfect you get more bandwidth per pin.
It's all a matter of tradeoffs, there are no simple solutions, or one-line answers to engineering. Requiring tight tolerances raises the cost of production. Reducing pin counts reduces the cost of production. Which is more important? Anybody who tells you that one or the other dominates in all situations just doesn't know what he is talking about. The world just isn't that simple.
-- Carl |
