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Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 88.13+1.0%Nov 21 9:30 AM EST
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To: Dave B who wrote (40162)4/18/2000 1:03:00 AM
From: Scumbria  Read Replies (1) of 93625
 
Dave,

I'm not sure what value increasing the DRAM bandwidth provides a CPU. Assume a 1.0 GHz CPU accesses DRAM 1% of the time (1% is very high for cache misses in the L1+L2.) Each cache miss brings in 32 bytes. The bandwidth requirement is:

1,000,000,000 cycles/sec X .01 dram accesses/cycle X 32 bytes/dram access = 320MB/S.

As evidenced by the Intel charts, cheap SDRAM provides plenty of bandwidth to meet this requirement. The actual bandwidth requirements are considerably less because I am assuming that most L2 accesses are missing.

Also evident from the Intel chart is the fact that SDRAM provides better latency until the it gets saturated, which should not occur very often.

Scumbria
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