It is a moving target, but the latest edition of the International Technology Roadmap for Semiconductors places the most optimistic limit of CMOS scaling at roughly 20nm. Quoting from the roadmap introduction.
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As the reader will realize by studying this newly created document, the number and the difficulty of the
technical challenges continue to increase as technology moves forward. The red areas signifying: ?No
solutions yet? are in most cases shown within a 5-year reach. Traditional scaling, which has been at the
basis of the semiconductor industry for the last 30 years, is indeed beginning to show the fundamental limits
of the materials constituting the building blocks of the planar CMOS process. However, new materials can
be introduced in the basic CMOS structure to replace and/or augment the existing ones to further extend the
device scaling approach. Since the assimilation of these new materials into the modified CMOS process
gives the device physicist and the circuit designer improved electrical performance similar to the historical
trends, this new regime has been often identified as ?Equivalent Scaling.? It is expected that these new
materials will provide a viable solution to extending the limit of the planar CMOS process for the next 5?10
years.
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Another sense in which items may be ?on/off the Roadmap? is in terms of the breadth of technology
addressed. The scope of the 1999 ITRS specifically includes detailed technology requirements for all
?Complementary Metal-Oxide-Silicon? (CMOS) integrated circuits, including mixed-signal products. This
group constitutes over 75% of the world's semiconductor consumption. Of course, many of the same
technologies used to design and manufacture CMOS ICs are also used for other products such as compound-semiconductor,
discrete, and micro-electromechanical systems (MEMS) devices. Thus, to a large extent, the
Roadmap covers many common technology requirements for most ?thin-film-process-based
micro/nanotechnology.?
The ITRS time horizon (15 years) provides another boundary to what may be considered ?on/off the
Roadmap.? To date, each edition of the ITRS has been built around a view toward continued scaling of
CMOS technology. However, with the 1999 edition, we are reaching the point where the horizon of the
Roadmap approximately coincides with the most optimistic projections for continued scaling of CMOS (for
example, MOSFET channel lengths of roughly 20 nm). It is also difficult for most people in the
semiconductor industry to imagine how we could continue to afford the historic trends of increase in process
equipment and factory costs for another 15 years! Thus, future editions of the ITRS may begin pointing
toward more radical approaches to perpetuate our ability to further reduce the cost-per-function and
increase the performance of integrated circuits. It is probable that such approaches will involve new devices
as well as new manufacturing paradigms. It is a strong intent of this edition of the Roadmap to help us
prepare for the future by enhancing communication and stimulating creative solutions to the many critical
issues and research needs identified herein.
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