SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Aware, Inc. - Hot or cold IPO?
AWRE 2.2100.0%3:59 PM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Perry P. who wrote (8794)5/3/2000 11:04:00 AM
From: Perry P.  Read Replies (1) of 9236
 
This may be a rehash of what this thread has talked about, but I wanted some clarification. The following news release from way back states that ADI and Virata have joined together to combine Virata's Helium chipset with ADI's AD20msp930 chipset (Based on Aware). Does this mean that all those announcements we have seen from Virata in regards to the Helium chipset, have actually been good for Aware since they probably used Analog's physical layer solution? The Helium is a Physical layer neutral chipset, which I presume means it requires a physical chipset to incorporate with to be complete. Virata's Boron and Berillium chipsets would be capable of displacing the need for ADI's chipset in the physical layer, but they would not be out until this summer. The reason I bring this back up, is that it makes a big difference in the number of Aware royalty chipsets. That is unless ADI is already banking on the sales with Virata in their 4 million chipsets prediction for this year. Any clarification would be greatly appreciated.

content.analog.com

ANALOG DEVICES AND VIRATA DEVELOP ADSL REFERENCE DESIGN SOLUTIONS


Santa Clara, CA (January 18, 2000) - Analog Devices, Inc. (NYSE: ADI) and Virata (Nasdaq: VRTA) today announced the joint development of a reference design kit for the rapid deployment of Asynchronous Digital Subscribers Line (ADSL) customer premises equipment (CPE) devices. The reference design kit is a complete system solution to be offered to manufacturers of external ADSL CPE including modems, gateways and routers. The solution will consist of ADI?s AD20msp930 ADSL chipset, and Virata?s Helium? communications processor and networking software.

The new reference design offers support for both the G.992.1 and G.992.2 forms of ADSL (also known as full-rate ADSL and G. Lite) and comes in Ethernet and USB versions. In addition, the reference design offers interoperability with central office (CO) equipment based on Analog Devices? ADSL chips. The kit includes the hardware platform with schematics, physical layer discrete multi-tone (DMT) chipset, and ATM, IP and PC driver software, and is supported by both ADI and Virata.

?As the leading independent ADSL silicon vendor, Analog Devices joined forces with Virata to develop this reference design kit in order to expedite the deployment of ADSL,? said Mike Ziehl, ADI?s director of broadband marketing. ?This kit provides a complete system solution for CPE equipment manufacturers and makes their design challenge easier by offering time-to-market and performance advantages as well as flexibility and widespread interoperability.?

?The combination of Virata?s Helium processor, software and systems expertise with ADI?s ADSL physical layer solution and AFE expertise has resulted in a strong broadband design partnership,? added Duncan Greatwood, vice president of marketing for Virata. ?This collaboration achieves new levels of integration while meeting the stringent cost and performance requirements of our customers, and enhancing their opportunity for product differentiation.?

The reference design kit features ADI?s AD20msp930, the latest addition to Analog Devices? leading family of ADSL chipset solutions. ADI?s AD20msp930 AD20msp930 enables up to 10 Mbps of Internet data throughput per subscriber line, which is more than 100 times faster than 56-kbps analog modems. The industry standards-based interoperable chipset is designed for both CO Internet access equipment and customer premises equipment (CPE). The chipset also includes a new high-performance analog front end (AFE), and ADI's low-power line driver.

For its network processing and controller capabilities, the reference design uses Virata's Helium chip, a highly integrated communications processor combining an ATM engine, IP processing, Ethernet and USB interfaces with control of DSL physical layer chips such as the AD20msp930 AD20msp930. Helium is designed for use in high-speed, single- and multiple-user endpoint devices such as modems, residential gateways, routers, as well as in channel banks and line cards for DSLAMs.

Virata is also providing the network processing software for the design, which includes bridging, routing, and tunneling functions in addition to the core ATM processing capability. This integrated software supports ease of development, enabling rapid, low-risk product design and roll-out of reliable cost effective products.

Availability and Pricing
he ADI/Virata reference design will be available in April 2000, and will be jointly sold and marketed by both companies. Please contact Analog Devices or Virata for pricing information.


Perry P.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext