Intel commits to using only Rambus with upcoming Tehama chip set
By Will Wade
EE Times
(05/09/00, 06:15:17 PM EDT)
FOLSOM, Calif. ( ChipWire) -- Intel Corp. is running prototypes in the lab of core logic for its upcoming Willamette
microprocessor, featuring support for Direct Rambus DRAM technology. Both the core logic and Willamette are due for
commercial release by the end of the year. But analysts are concerned that Intel's focus on RDRAM could backfire if the
memory chips are not available at competitive prices by then.
Intel has working silicon for both Tehama, the primary chip set for desktop PCs using the Willamette processor, and
Colusa, the chip set designed for the server version of the Willamette MPU, code-named Foster.
Reiterating Intel's dedication to RDRAM, Louis Burns, vice president and general manager of the company's chip set
group, said, "From a technical point of view, RDRAM is absolutely the best solution."
While PC OEMs have started to ask memory vendors to provide double-data-rate (DDR) SDRAM to increase system
performance at prices lower than for RDRAM, Intel's new processor will only work with RDRAM. "My roadmap does not
include any DDR," said Burns.
However, Intel had said the same thing a year ago on the eve of the release of its 820 chip set, code named Camino.
That chip set was designed to link the Pentium III processor with memory, and Intel insisted that was its only function.
Since then, RDRAM chips have been in short supply and system OEMs have been reluctant to adopt the expensive
technology in volume. A few months ago, Intel announced that the 820 also works with a memory translation hub (MTH)
that allows the chip set to run with standard SDRAM (see Feb. 18 story).
Dean McCarron, principal analyst for Mercury Research in Scottsdale, Ariz., said that about three-quarters of the Camino
chip sets shipped in the first quarter of this year were intended to work with SDRAM. "A lot of people are using the MTH,"
he said.
While Burns insisted that Intel has no plans to produce anything similar to the MTH for the Willamette and Tehama
product generation, McCarron said it would not be difficult for the company to quickly produce such a chip if necessary.
"Intel is fanatically committed to Rambus," said McCarron. With a top speed in the 800-MHz range, RDRAM is much
faster than the 266 MHz seen with current samples of DDR SDRAM. However, McCarron said, RDRAM has a longer
latency period than SDRAM-based designs. And without full systems using both technologies for a side-by-side
comparison, it is still difficult to name one technology as the clear performance leader.
Performance may be moot, though, because cost is one of the most important remaining questions. RDRAM is at least
three times the price of SDRAM, said McCarron. This is a function of the still-limited availability of RDRAM, as well as
their lower yields compared to SDRAM and the mandatory royalty fees that must be paid to Rambus Inc. DDR SDRAM
is projected to be almost the same price as SDRAM by the end of the year.
"RDRAM availability is incredibly important for the Tehama and Willamette launch," said Intel's Burns.
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