This is interesting about HVPE:
The HVPE growth method does not require any buffer layer to be grown in-between GaN and SiC conductive substrate. This fact allows one to fabricate III-V nitride device structure with vertical current flow geometry.
tdii.com - TDI, Inc. GaN Epitaxial Wafers
Of course, it isn't necessary that there be no buffer layer, since it is also possible to grow conductive buffer layers, as is done by Cree, for example.
The buffer layer described in Cree's patent US5393993, "Buffer structure between silicon carbide and gallium nitride and resulting semiconductor devices" is a transition of discrete steps: a pure AlN layer adjacent to the SiC, then two alloy layers having different mole percentages of components GaN and AlN, then GaN.
This has the form X | (100-a%)X+(a%)Y | (100-b%)X+(b%)Y | Y | SiC
where X,Y are GaN,AlN and a,b are 30,90 in dependent claims (12&14, 20&22) covering a preferred structure. The buffer layer in its entirety can be either conducting or insulating (17, 18).
patents.ibm.com
That patent was filed back in December 1993, so it may now be the equivalent of stone age technology as far as Cree is concerned. A lot of progress can be made in seven years.
And TDI may be two guys with a machine for all I know.
WT |
