"... do you think there is a trend towards switching and routing functions moving downwards to the semi-conductor and embedded software level?"
Yes Ken, I do, within parameters. At lower granularities, i.e., where comparatively low-speed functions are taking place within routers and switches, I see this happening now.
But as the wirespeed increases into the optical region, I don't see lower granularity packets being switched by embedded software which is content-aware, or commoditized asic silicon for quite some time. Optical presents another plateau replete with its own challenges. We'll see major challenges here as we go from 10 Gb to the next power of ten, 100 Gb. Or, even to 40, or 160 Gb processes where some carrier vendors have defined their next SONET levels (OC-768/OC-3072).
In fact, it will take a breakthrough of Nobel Prize proportions, I believe, before we see individual user packets truly being routed at the optical level. The science isn't there yet.
Packet "flows" a la MPLS, or label switched flows and ATM virtual paths/circuits, on the other hand, are another story. Those flows are the recipients of packets which have already been examined, grouped and buffered at a lower speed. Those aggregates are not what I'm referring to.
I'm referring, instead, to your TCP/IP packets, Ethernet Frames, UDP datagrams, etc., and the layers above Layer 3/4 that must be examined, adjudicated and forwarded at the edge (or local distribution) router level, and maybe examined at the core router, as well.
The lower speed packet processing functions which take place in the discrete network element levels which are now bing used, in comparison to the optical flow aggregates, are still taking place at relatively low speeds, and they constitute the realm that your question addresses I would imagine, where the commoditization will take place, indeed, where it "is" already taking place, now.
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