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Technology Stocks : Intel Corporation (INTC)
INTC 34.72-2.3%Nov 17 3:59 PM EST
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To: Tenchusatsu who wrote (103699)5/26/2000 10:43:00 PM
From: wily  Read Replies (2) of 186894
 
Tenchusatsu,

There's a big difference. Xeon's SRAM is a cache. Embedded memory is a replacement for DRAM (at least in the way we're talking about it).

Actually, what I really want to talk about is embedded cache: since OUM is nonvolatile, it can replace SRAM. I'd like to know, is there a point at which increasing cache size yields diminishing returns? For instance, what would cumine performance be like with a 25MByte level 2 cache; with a 100MByte level 2 cache? What would be the effect of a large level 1 cache (although I'm not sure this would be possible with OUM since the chalocogenide steps must come at the tail end of the manufacturing process)?

Here is another question: Is there any performance advantage (i.e., speed) if the system memory ("out on the bus") is static -- i.e., doesn't need refreshing?

Thanks,
wily

For anyone interested, Intel has a 17% equity interest in Ovonyx. Ovonyx is a 50/50 joint venture between Tyler Lowrey (the former CTO of Micron) and Energy Conversion Devices (ENER).

There are two OUM related slideshows, at:
ovonic.com
ovonic.com

There are very many OUM and ovonic phase-change patents, but here are a couple interesting ones:
164.195.100.11
164.195.100.11

Here is an interview with Tyler Lowrey, talking about OUM:
wallstreetreporter.com
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