Nokia takes VSIA standards on the road for 3G work
SATURDAY, JUNE 03, 2000 6/3/2000 12:06:00 AM - CMP Media
Jun. 02, 2000 (Electronic Engineering Times - CMP via COMTEX) -- In mobile communications, it's important to develop design methodologies that shorten the time-to-market and support the rapid creation of design derivatives. So Nokia Research Center and its development partner, InterDigital Communications Corp., have been developing system-level design methodologies that employ reusable virtual components. Now they have teamed with EDA provider CoWare Inc. to test new Virtual Socket Interface Alliance (VSIA) standards using a 3G cellular pilot project.
In the case of third-generation cellular, it is already clear that there will be multiple variants of the standards. It is essential that functions known to be common across the variants can be reused in many different 3G designs.
Further complicating matters, a 3G cellular system has many elements that can be common across different subsystems with very different system design constraints and architectures. For example, components with identical functional descriptions could be used in both basestations and handsets with very different architectural and implementation needs. It clearly helps to remain as independent as possible of the product implementation, including the specifics of the processor and associated bus, until the latest possible stage in the design process.
As an active VSIA member, Nokia Research Center supports the work of the alliance in several Development Working Groups, especially the System-Level Design (SLD) and On-Chip Bus (OCB) DWGs. Those groups have been working to develop System-Level Interface (SLIF) and Virtual Component Interface (VCI) standards for the exchange and integration of virtual components (VCs).
CoWare has also been active in VSIA, especially within the SLD working group. CoWare's methodology for system-level design closely mirrors the SLIF documentation standard and offers key technology that can automate the generation of VCI-compliant interfaces. That's why Nokia and InterDigital decided to join forces with CoWare to test the new standards with a realistic VC design and a real system-level integration tool.
CoWare's N2C hardware/software codesign product served as the design environment for the virtual system. It lets system architects capture, animate and validate their concepts into an unambiguous system specification in C/C++. That provides the earliest possible validation of system functionality, removes ambiguity and acts as a golden reference model throughout the design process. Functional blocks within the specification are captured in a style that separates the behavior of the block from the communication between the blocks.
That makes it easy for designers to quickly evaluate the effects of using alternative architectures before spending time implementing any of them. It also makes it easy to use VCs to represent major portions of the design while keeping the them independent of the final processor and bus architecture. The designer can then see the effect on the design as the VCs are mapped to various implementations.
The CoWare technology that maps VCs and their related communication protocols to a particular bus architecture and transaction set is called Interface Synthesis. It automatically synthesizes the interfaces-hardware glue logic and software drivers-in a design.
One of the key goals of the Nokia-InterDigital-CoWare pilot project was to prove the usefulness of the SLIF method of documentation and to show how it links with the VCI standard. That was especially important considering that the VCs would be handed off between Nokia and InterDigital and within several different divisions of Nokia, so they had to be understood outside the team that created them.
The pilot project followed the levels of description set out in the SLIF standard. Layer 1.0 describes the interface of a VC using message and transaction classes at a level independent of the implementation method or architecture. These are refined down through as many intermediate levels as necessary, termed the 0.x layers, to reach layer 0.0, which describes architecture-dependent transactions at cycle-accurate levels.
All these levels can be described in C/C++ using tools such as CoWare N2C or emergent system-design languages such as SystemC. Layers 0.0 and 0.x can also be described using RTL VHDL or Verilog.
The behavioral hand-off level, one of the intermediate 0.x layers, reflects some aspects of architectural choice for implementation while remaining independent of the exact implementation. From there, implementation can take place in a manner appropriate for the implementation method, which could imply manual design vs. automated generation of a bus subsystem in CoWare. Those levels were described in parallel using the SLIF method to check consistency of the SLIF with the other paths.
The design in the Nokia-InterDigital-CoWare pilot project consisted of a convolutional encoder, Viterbi decoder and built-in self-test (BIST) capabilities. The encoder and decoder were implemented as one VC, since they are both always needed in a transceiver and they can be used to test each other.
The additional logic needed for the logic BIST is minimal for that reason. For the pilot project, the components were taken through the whole implementation path, from system-level specification, via C-models, to VHDL RTL and synthesis, targeting a prototype gate array technology.
The gate array was connected to an ARM processor. The VC could be tested via a testbench utilizing external test stimulus and expected results checker, or via its own BIST capabilities. There is a GUI in the CoWare simulation environment to allow test setup and reporting.
Each of the configurable blocks in the system could be controlled via the GUI. ARM software was used to control the VC's function via memory-mapped I/O. The data can be written or read either through the processor interface or directly through the hardware I/O of the VC.
We set out to show that this methodology was useful for a VC handoff, that the specifications flowed all the way to implementation and that all of this could be shown on a real design with real EDA tools.
ANSSI HAVERINEN IS RESEARCH MANAGER AT NOKIA RESEARCH CENTER, JOHN KAEWELL IS A SENIOR VICE PRESIDENT AT INTERDIGITAL COMMUNICATIONS CORP., AND PETE HARDEE IS DIRECTOR OF PRODUCT MARKETING AT COWARE INC. (SANTA CLARA, CALIF.).
eetimes.com
By: Anssi Haverinen, John Kaewell and Pete Hardee
Copyright 2000 CMP Media Inc.
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