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Politics : Formerly About Advanced Micro Devices
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To: Cirruslvr who wrote (114181)6/5/2000 2:07:00 AM
From: Tenchusatsu  Read Replies (3) of 1575488
 
Cirrus, <Looks like the PIII L2 cache is better than the AThlon's. PIII's L2 cache has something like a 7 cycle latency vs. Thunderbird's 11 cycles (according to Anand), and PIII's cache is 256 bit wide vs. Thunderbird's 64 bit. 1995 core keeps up with 1999 core. Amazing, huh?>

Two comments:

1) T-bird has a higher L2 associativity (16-way) than Coppermine (8-way). The benefit of this is slightly fewer L2 cache misses. The trade-off here, however, is the longer latency: a higher associativity slows down the cache. That's why the longer latency is required.

2) The 64-bit BSB width is surprising to me. With the "exclusive" L2 cache (a.k.a. Victim Cache), I figure T-bird will need the BSB bandwidth a LOT more than Coppermine because of all the swapping of data between L1 and L2. Maybe AMD will increase the BSB width on Mustang.

Tenchusatsu
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