448MB = 3584Mbits
Assume F=10
L=.25
Therefore 128Mbits per 1/4" X 1/4" array (per the table below)
Therefore 28 arrays needed.
Since they are stacking by 2's, this is the equivalent of 14 256Mbit arrays.
This is very close to the CF card capacity of 16 chips projected by my calculations in a previous post.
Message 13940840
If Sandisk's largest CF card is 192, that would mean that they are probably using .28um technology and not stacking. Or, they ARE stacking but they are not using D2 (multi-level cells).
Also, Hitachi is selling 1000 cards for $900ea. Assuming 30% gross margin, that means they are getting about $692 for the cards. Assume 30% of this is non-wafer-processing costs, so about $460 is the cost of the chips. Let's assume 1/4 of this is for the controller. So, $345 is for the 28 chips, which makes them $12ea.
How many good chips per wafer -- 500?
A wafer is 8" across, so radius is 4". That makes the area about 50in2. If the array is 1/4" on a side, then it is .0625in2. Adressing logic takes 25% of chip area (WAG), so the chip is .083in2.
50/.083 = 600 chips. But since the wafer is round, you will lose chips along the edges, plus defect loss and breakage, so maybe 500 chips per wafer. That's $6000 of income per wafer.
Why am I doing this? It may be helpful in estimating income based on die shrinks and capacity expansion. Any help and comments appreciated...
wily
L F cell size cells Mcells per Mbits/array
(um^2) per um^2 1/4"X1/4" @ 2bits/cell
array
.25 12 0.75 1.33 53.7
.25 10 .625 1.6 64.5 129
.25 8 0.5 2.0 80.6
.18 12 .389 2.57 103
.18 10 .324 3.09 124 248
.18 8 .259 3.86 155
.18 6 .194 5.14 207
.18 4 .130 7.72 311
.18 2 .0648 15.4 622
.13 10 .169 5.92 238 476
.12 6 .0864 11.6 466
.12 4 .0576 17.4 700
.12 2 .0288 34.7 1400
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