Dear Elmer:
Simple probability distribution functions.
A speed yield curve is where the number of processors manufactured cannot make stable (some parameters needed here) operation at divided by all the processor chips made. This generates a PDF curve starting at 0% at a speed of minus infinity. This curve jumps to the probability of a bad (not running at any speed) chip at zero MHz. This is the 100% minus the yield by the definitions of the chip plant (read process engineers). As we move farther to the right (higher clock speeds) more and more chips fail to make that speed. The curve reaches 100% at some speed that no chip can run at. This makes it a non-declining function.
The speed yield curve I, and most others like Scumbria, refers to the inverse of this curve or 100% minus the value on the PDF described above. Thus, the number is the probability of any one chip matching or exceeding the stated speed stably (using same parameters used to make the PDF).
Thus, as the speed increases, the probability falls (very rarely is there a plateau). Sometimes it falls slowly and other times it falls quickly. When it is at the lowest speed currently being sold (using some additional shippable factors), this is the probability that any chip could be sold. When the probability reaches 1/2 of the previous number, this is the mean shippable speed, that is half of the chips could ship at or above this speed and half must ship below. As the lowest speed increases, the probability shrinks that a chip can be shipped. When more steps are done, dicing the wafer, packaging the die, test with other components, this curve shrinks downward as losses due to breakage, bad other components, etc. Thus the overall yield, the probability that any chip is able to be shipped shrinks.
The goal of the process guys is to either increase this curve in the shippable ranges or make it stable so that planning can go on as to how many chips can be shipped to cover demand or orders. Wildly changing curves high one batch and low the next cause much fustration as planning goes out the window.
Now to the meat of this. Intel appears to have the mean shippable speed somewhere around 650Mhz to 700MHz. All attempts so far have not gotten it to reliably get above this speed. Now what this speed is exactly, only a few Intel employees know. But customers who see that a 700MHz celeron is about as fast as a much more expensive PIII will opt for the Celeron over the PIII. What the difference is that will get a sufficient number to go after the PIII is what the marketing people at Intel need to figure out. It definitely is not 1 or 2% any more. Now if the PIII speed yield curve is very flat between x and x + 33, or 50MHz, relative to the amount at x MHz, Intel does not have much of a problem. However, to date, from all outward appearences, x to x + 33MHz is on the order of 10 to 20% when x is 700MHz. Now Intel will lose about 6% to 12% in gross revenue per chip shipped. This is about 500 to 1000 Million dollars per quarter. How does the stock price react to a 16% to 33% drop in profits? This would be a disaster for Intel. If the order is more like 50% or more because the delta expands to more than 100MHz range, Intel could actually start losing money. That would be like a meteor strike at headquarters. At this point Intel would have two choices, both bad, give up the Celerons, start cutting overhead, selling or closing money losing divisions, firing staff, etc, in other words a big shakeup both in management and in current practices. Or riding it out and hope that future products save the company.
Let us see how this plays out.
Pete |
