Finally something! Chapter 10 I/O Buffer Characteristics 195
21910E — March 2000 AMD-751™ System Controller Data Sheet
Preliminary Information
10 I/O Buffer Characteristics
Except for the AMD Athlon system bus, all of the AMD-751
system controller inputs, outputs, and bidirectional buffers are
implemented using a 3.3V buffer design. The AMD Athlon
system bus runs at the processor core voltage (nominally 1.6V).
AMD has developed a model that represents the characteristics
of the actual I/O buffers to allow system designers to perform
analog simulations of the AMD-751 system controller signals
that interface with the various system components. Analog
simulations are used to determine the time of flight of a signal
from source to destination and whether the system signal
quality requirements are met. Signal quality measurements
include overshoot, undershoot, slope reversal, and ringing.
10.1 I/O Buffer Model
AMD provides a model of the AMD-751 system controller I/O
buffer for system designers to use in board-level simulations.
This I/O buffer model conforms to the I/O Buffer Information
Specification (IBIS). The I/O model contains voltage versus
current (V/I) and voltage versus time (V/T) data tables for
accurate modeling of I/O buffer behavior.
The following list characterizes the properties of the I/O buffer
model:
All data tables contain minimum, typical, and maximum
values to allow for worst-case, typical, and best-case
simulations, respectively.
The pullup, pulldown, power clamp, and ground clamp
device V/I tables contain enough data points to accurately
represent the nonlinear nature of the V/I curves. In addition,
the voltage ranges provided in these tables extend beyond
the normal operating range of the AMD-751 system
controller for those simulators that yield more accurate
results based on this wider range.
The rising and falling ramp rates are specified.
This is close to my thoughts on propagation delays
Milo
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