<font color=darkblue>Hansdevries excellent info! I like this part of the info.
"Applicant(s): Advanced Micro Devices, Inc., Sunnyvale, CA
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Issued/Filed Dates: July 11, 2000 / April 7, 1998
Application Number: US1998000056834
IPC Class: H01L 29/00; H01L 29/94;
Class: 257/520; 257/336; 257/344; 257/382; 257/384; 257/510; 257/513;
Field of Search: 257/508,510,513,514,515,520,521,336,343,382,383,397,413,344,384
Abstract: A semiconductor integrated circuit with a transistor formed within an active area defined by side-walls of a shallow trench isolation region, and method of fabrication thereof, is described. A gate electrode is formed over a portion of the active area and LDD regions formed that are self-aligned to both the gate electrode and the trench side-walls. A dielectric spacer is formed adjacent the gate electrode and extending to the trench side-walls. In this manner, the spacers essentially cover the LDD regions. Source and drain regions are formed that are adjacent the trench side-walls wherein the spacer serves to protect at least a portion of the LDD regions to maintain a spacing of the S/D regions from the gate electrode edge. In this manner an advantageously lowered EM provided by LDD regions is maintained. In some embodiments of the present invention, S/D regions are formed by implantation through the trench side-walls.
Thankyou Sir
Milo |
