I designed a memory system with a controlled impedance signal path back in 1991 (for a 200 MIPS RISC processor). We were using VRAM because at the time it was the only way to get the instructions to the processor fast enough.
I don't need to provide links, I know from painful experience how hard it is to do it another way.
I don't doubt that a closed box DDR system can be demonstrated, it's probably not too difficult. What I do doubt is whether an open box system can be made reliable when you have to allow for customers adding to or changing the memory modules, thermal problems, and power supply tolerances.
Even with PC100 SDRAM there was a problem. I worked with a major PC manufacturer who spent months telling us (the BIOS company) to fiddle with the drive power of the memory buffers on the BX chipset, according to the combinations of DIMMS detected as installed, and still didn't manage to make the systems work with all the combinations their QA department was testing. When we did find settings that worked, often their EMC testing people would reject it and send us round the loop again due to excessive radiation.
This will be worse with PC133, and much worse with DDR266. Engineers often think that evolutionary steps in a technology are easier than revolutionary ones, but that is not always true. Innovative engineering comes from recognizing, in time, that a technology is reaching the end of the road, and starting with a blank sheet for the next generation.
In my considered engineering opinion, DDR266 is pushing the old memory interconnect technology one step too far.
Of course in graphics cards where it is point to point, DDR will work just fine, even at higher speeds, because its a controlled environment. It's a good, logical choice there.
Rambus solves the problems of high speed PC main memory because it is a complete specification of the memory subsystem. The tight tolerances imposed on RIMM manufacturers will guarantee inter-operability. |
