I said: 3.6 M would be acceptable (but not outstanding) yield.
And you consider 48% Yield to be ACCEPTABLE? My Process Engineering friends would LAUGH at you.
We may argue about some percentages up and down, for example you said:
Wafer Area / Die Area = Total Die Per Wafer
31,400 / 117 = 268.37 Die Per Wafer
But let's be fair, and count for partial die, and say 250 Die Per wafer.
I am no expert in the field, but I have seen losses on edges and between individual die amount to more than that. Also, I don't know if 117 mm^2 is the official numner. I have used 120 mm^2 for Tbird.
Excuse me, but that 117mm^2, number came from Dr Tom Pabst German Web Site, as the link clearly showed, and all AMD Fans KNOW how accurate he is. Also, I used T-Bird, which has the largest die size, therefore resulting in fewer total die per wafer. I didn't take into account Duron, which has a smaller die size, and therefore would yield more die per wafer, and therefore even worse yields.
3.6 million chips claimed by Jerry is the number of chips sold (which may be limited by the availability of chipsets). It is also a number that is the worst case scenario for AMD, because they sure don't want to miss it. They will most likely produce more.
Sorry, but Jerry Sanders doesn't strike me as announcing "Worst Case", and you know it
I guess these minor points combined will result in a yield in the 50s which again is acceptable (but not outstanding) yield.
Joe
Well baby, I got news for ya, those kind of yield numbers wouldn't even pay the bills. You can spin it any way you want to, but it still comes out that 50% yield is crap, and would be unacceptable to any modern Semiconductor Manufacturer. If my tools were producing 50% Yield wafers, I'd be fired. But like you said, you're no expert. I am.
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