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Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 215.39

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10:53 AM EST

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To: pgerassi who wrote (5168)	8/15/2000 6:56:03 PM
From: Saturn V	Read Replies (1) of 275872

Dear Pete, Ref<The 286 is not pipelined. There is no branch misprediction penalty..... .> We may be arguing about semantics. To me 80286/386 were pipelined, because before the execution of one instruction was complete, the following instruction was loaded and decoded. This means pipelining to me, ie, several instructions are being processed simultaneously, each one slightly ahead of the other. I know that prior to the Pentium, the term branch prediction penalty was irrelevant. So I was using the term branching penalty, "the extra cycles taken when a branch is taken" vs " branch not taken". Since we are having semantic problems by comparing Pentium 4 with 80286, 8088, I suggest we drop that comparison. Let us stick to the "Pentium" vs "Pentium II(III)" comparison only. I will reiterate my position that the Pentium II had a higher IPC ( Instructions per Clock) despite a much longer pipeline, than the Pentium. I expect the same from the Pentium 4.

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