SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 215.32-0.2%3:59 PM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: pgerassi who wrote (5183)8/15/2000 9:01:52 PM
From: Saturn VRead Replies (1) of 275872
 
Dear Pete,
I agree that "out of order execution" improved the IPC of the Pentium II.

You and Scumbria are making a big deal of the branch misprediction. Most CPU time is spent in some loop or the other. So branches prediction will work pretty well in any piece of repititive code.(Correct prediction 95-98%). The only problem is a branch encountered for the first time !(Correct prediction of 50%). How oftem is that ? Obviously it will depend upon the benchmark ,ie how much time is spent in "repitive code" vs "non-repitive code".

In most CPU hungry applications repitive code dominates. Examples are graphics, image processing, signal processing etc. The non-repitive code is found typically in the prolog and the epilog of the application, and the main act of most computer programs are loops, loops and loops.

So any branch mispredict penalty if any, would be washed away by the other enhancements of the P4 family, just as it happened in the Pentium II.

We can argue ad infinitum on this issue.

I suggest we revisit this issue when the performance metrics of the P4 finally become public.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext