I found this promising article dated July 24th:
(I put some interesting notes in bold type.)
electronicnews.com
EZchip Muscles Past NPU Field
Looking beyond OC-192
by Jayant Mathew
While most first-generation NPU companies are relying on RISC-based
architectures to deliver OC-48 rates at wire speed, an upstart Israeli company is
pioneering a design the company claims will allow it to move beyond OC-192 on
a single piece of silicon. What's more, it can do packet processing at all seven
layers of the network.
EZchip Technologies, based in Migdal Haemak, Israel, is barely a year old but it
is already at the forefront of the NPU arena. Even though its product is a year
away from shipping, the company has reported that its NP-1 NPU can deliver
OC-192, or 10Gbytes/sec. at wire speed in all seven layers of the network. This
is a major accomplishment, given that RISC-based processors can deliver only
up to OC-48, or 2.5Gbytes/sec., and face hurdles as they move beyond layer 4.
EZchip has shied away from RISC-based designs and has—in
effect—revolutionized the design of NPUs. First-generation NPUs consisted of
stacked RISC cores and optimized the instruction set without working on the
data bus. This approach was good enough for OC-48 rates, but fell short as the
devices attempted to move to higher rates.
EZchip solved the problem by building task-oriented
processors, i.e., assigning tasks to specific processors on
a single chip, said Eli Fruchter, president and chief
executive officer of EZchip.
"We divided tasks and built a processor that is optimized
for each task," he said.
The result is TOP (task optimized process technology),
which is 10 times faster than RISC processors, according
to Fruchter. The EZchip NPUs also feature embedded
memory that substantially enhance their performance.
For example, EZchip's processors can parse, or extract the
URL from a packet in 60 clocks, search the URL tables in
six clocks and resolve a multicast routing decision in eight
clocks, according to Fruchter. A RISC processor seems to be at least a
generation behind, as it takes about 400 clocks just to parse a URL, 200 clocks
to search URL tables and another 80 clocks to resolve a multicast decision.
With this technology, EZchip is set to tap the growing market for the
next-generation switches and routers. In fact, the market is expected to grow
between 66 percent and 72 percent to $3 billion in 2004, up from about $300
million in 1999, according to estimates from market research firms
Cahners-In-Stat and GartnerGroup Inc.'s Dataquest.
So far the mantra is simple: If you have a cutting-edge design, the chances are
one of the big players like Motorola or Lucent will offer to buy you. That presents
an opportunity and a challenge for next-generation start-ups like EZchip.
EZchip has found a market because its technology can address some of the
issues like content switching in layer 5 to layer 7 at wire- speed. As more
vendors are upping their service requirements, there is additional pressure to
know the content in the higher layers. "In order to know what the content is, you
need to go from layer 5 to 7," Fruchter said. "We can provide the superior quality
of service between content." Other tasks include security, load balancing, and
service level agreement.
EZchip's architecture is configured to provide content switching in four tasks:
parse, search, modify and resolve. In the parse phase, it extracts the field from
the packet. The search phase involves going into the memory and searching for
matches to decide what to do with the field. And in the modify stage, the field is
changed within the packet. For example, if you need to change the priority of a
certain packet over another one, then the router needs to change the intellectual
property address. In the resolve stage, a decision is made whether to send the
packet to one port or to all the ports.
EZchip is well-positioned because vendors are receptive to packing all these
functions on a single piece of silicon, according to analysts and industry
insiders.
"Just plug it in and it works; this is what the companies are looking for," said
Max Baron, an analyst at Cahners In-Stat, Scottsdale, Ariz. "If this works,
companies can now worry about something else." But the company first needs
to get its chip out of the door. Analysts said it will be a setback if the company
fails to introduce the chip in time and also to price it competitively because it
contains multiple features.
Also, competition from high-profile start-ups like Silicon Access and Solidum
Systems is bound to usher in another battle for NPU dominance.
"All these companies are in a different category. EZchip has an excellent
product, but it's terribly underrated," said Frank Dzubeck, president of
Communications Networks Architects Inc. "Any company has the edge, it's
finally up to the designer."
EZchip's NP-1, which has 64 processors on a single chip, is expected to sample
in March 2001, with volume shipments in June. "We have one of the big guys
who is a committed customer and many smaller players, but there is no
commitment for volumes," Fruchter said. |
