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Technology Stocks : Intel Corporation (INTC)

INTC 39.64

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To: Tenchusatsu who wrote (107932)	8/21/2000 8:10:28 PM
From: kapkan4u	Read Replies (1) of 186894

<Don't forget that part of the penalty is reduced thanks to the Execution Trace Cache. Instead of having to decode instructions again from the mispredicted branch onward, the pipeline can immediately be filled with predecoded instructions in program order.> Don't forget that part of the penalty is increased when the branch target is outside of Execution Trace Cache. Not only the pipeline is flushed, but also the execution trace has to be decoded into the Trace Cache. I think that it was you who said that P4 retained the clunky PIII decoders running at half the speed (700MHz for the 1.4GHz part) of the core. Kap

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