Advanced Micro Devices - Moderated (AMD) Message Board

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD)

AMD 259.65

+2.3%

Jan 23 9:30 AM EST

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next

To: Scumbria who wrote (6524)	8/25/2000 12:30:30 PM
From: EricRR	Read Replies (1) of 275872

Scumbria: What a bunch of cr@p. However, I did some thinking today, and figured out what Intel's Netburst marketing strategy is. They will say that P4 optimized software can use SSE instructions and high bandwidth RDRAM to preload lots of speculative data into the L2 cache, without saturating the bus. This will allow for very good L2 hit rates, and reduce long latency DRAM accesses caused by L2 misses. This technique will work very well on predictable benchmarks like Linpack, but will not work so well on normal Window's code (because it will pollute the L2 cache with unwanted data.) Explicitly Parallel Prefetching? ... and the smart compiler will follow branches and speculatively load possible execution paths into the cache. LOL!

Report TOU Violation

Share This Post

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next