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Politics : RAMTRONIAN's Cache Inn
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To: NightOwl who wrote (7570)8/26/2000 4:29:11 AM
From: NightOwl  Read Replies (1) of 14464
 
TO: Interested EE's

eetimes.com

I don't know whether or not INTC/RMBS/Samsung have come calling for help, but it appears they have few options. FcRAM and VCM DRAM would seem counterproductive for their application.

Aside from the controller complexity and lower yields for VCM as compared to DDR/ESDRAM-Lite, I also assume the exclusion under Sec. 2.1.3 of the NEC/VCM license from RMTR would come into play if DRDRAM's core were redesigned to employ a VCM style cache mechanism:

2.1.3 The rights granted under Section 2.1.1 do not extend to the use of the Licensed Products when the Licensed Products are controlled in such a manner that (a) a subportion of the DRAM can only be mapped to one block of the SRAM Memory throughout operation of the device, and (ii) data is written to that subportion of the DRAM through a Direct Write-Only Path.

My assumption as to the import of this clause is based on my pitiable understanding that DRDRAM requires a design that sends each "data packet" to one discrete bank of the memory core rather than spreading it around. But again even if I am
wrong in this regard a four bank DRDRAM core, on either a VCM or FcDRAM design, would appear to be a poor solution if the goal is to reduce their costs associated with DRDRAM's die penalty.

Of course they could always come up with some other "non RMTR", solution to their latency problems, but I wouldn't hold my breath waiting on that one. :8) All I can say is that if we do get such a "knock on the door" I sincerely hope RMTR's answer is to A) wish them luck; or B) give RMBS and INTC a taste of their own royalty "demands".

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