We make almost everything from discrete components, through complete systems.
Scumbria
Perhaps I didn't phrase my question correctly...
How many types of components employing multilayer metal, BICHMOS technology, do you make, that employs local interconnects.
I'm not saying you don't make some of them, but the "reactive Ion Etchback" process that IBM described, is more commonly known as "Dry Etch". Dry Etch happens to be my area.
If they are employing Dry Etch Techniques, to etch back the interconnect layer, then they are going to have lots of problems controlling the Etch Rates to insure that they don't break trough the Poly Layer.
For those unitiated, in order to use local interconnects, the interconnect layer would need to be applied underneath the first metal layer. That means that most likely, it would be applied on top of the PolySilicon Gate Layer. The Poly Layer, acts as the transistor gate.
Reactive ION Etching employs introducing a mixture of gases into the process chamber, and exciting the gas ions with either microwave or RF energy. The energy excites the gas ions, resulting in what is commonly known as "striking a plasma". The excited ions are driven down to the wafer surface by the RF, and the wafers are etched using this combination Physical/Chemical etching.
The advantage is, Dry Etch usually is used to create very straight sidewalls. The disadvantage in using it for this application, is that the individual etchers would need to maintain a very specific etch rate and uniformity in order to avoid "Poly Breakthrough".
The etchrate, is the amount of material removed per second. Uniformity is Etch Rate across the wafer. It is a combination of Gas Flow, RF Energy, and distance of the RF Electrode from the wafer. If the tool drifts off of it's etch rate, or uniformity, there is a possibility of removing too little material, resulting in high resistance, and low speeds, or too much material, and breaking through into the poly layer. Poly Breakthrough destroys the gate, which kills the transistor.
For SRAM, this is not a huge problem, because most modern SRAM has redundant transistors (with the exception of K3, by the way). If an SRAM transistor is blown, you can sometimes recover the die, by switching to the redundant transistors. Logic circuits don't have redundancy. You kill the logic transistor, you kill the die.
I know all about the amount of intensive labor that it takes to maintain the type of dry etch rates that this type of process demands for logic circuits, I lived it for awhile. And believe me, it is neither easy, or cheap, or high yielding. Go talk to your dry etch process engineer, and see how much he/she likes your process.
SemiconEng |
