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Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 95.73-0.6%10:53 AM EST
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To: Bilow who wrote (55532)9/27/2000 4:29:05 PM
From: mishedlo  Read Replies (2) of 93625
 
<<(1) Address / control / clock lines have to be duplicated because time of flight for these lines must match the time of flight for the data bus. If the data bus goes to fewer chips, and is consequently faster, than so to must the address bus. The only way to compensate for a connection to a chip is with a connection to a chip. Consequently, the address bus must connect to the same number of chips as the data bus. If the address bus connects to twice as many chips as the data bus, then the data bus will be proportionately faster, and the proportion will depend on the particular characteristics of the RDRAM chips used. Thus the delay cannot be compensated by adding extra signal length in the data bus wires - you cannot predict precisely what the characteristics of the RDRAM pins will be. This is part of the matching principle that Rambus uses to get so closed to the edge on their timing specs. Every signal on the RSL bus has to see exactly the same thing in order for the relative delays between signals to be (close enough to) zero.
(2) There is a timing relationship between the LSCK, RSCK, SIN, and SOUT signals and the RSL signals. They can't be allowed to get too far out of whack because orders to change driver current are regularly going out to RDRAM, even while the system is in use.>>

I believe I will take a pass at trying to dispute this or to even begin to accept or deny it.

However it is damn impressive sounding.
Thanks Carl
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