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To: pgerassi who wrote (111610)9/27/2000 7:05:07 PM
From: Tenchusatsu  Read Replies (1) of 186894
 
Pete, <AMD's is available for download for free (taking the freeware route (IMHO a better route to get more software available by launch)).>

"Open-source" and "Freeware" are also euphemisms for "Please, somebody support us."

<I believe that at some time in the future, both Intel and AMD would activate a mode to use the underlying RISC engine directly.>

I've heard this idea before back when Pentium Pro and K6 (also K5?) started translating x86 CISC instructions into internal micro-ops/RISC-ops.

AMD's stance is that they were able to carry CISC to performance-parity with RISC, at least in integer. They also expect to achieve the same results with floating-point. That's probably why it won't be necessary to implement your idea. (AMD also used that argument to hint that they can eventually carry CISC to performance-parity with EPIC and IA-64.)

On the other hand, maybe your idea can apply to Transmeta-style code-morphing. Unfortunately, Transmeta is going in a different direction toward power-savings, not pure performance.

Tenchusatsu
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