<font color=red>LDT here! What are the key features of the first Mercurian processor, the SB-1250?
The SB-1250 is a highly integrated Multi-Processor platform with two 64-bit MIPS CPUs, 512K L2 cache, DDR memory controller, and broad I/O support including three 10/100/1000 Ethernet MACs, PCI and LDT bridges, serial interfaces, SMBus, PCMCIA support and generic I/O. The heart of the SB-1250's multiprocessing system is a high-speed, coherent, 256 bit wide system bus that runs at half of the CPU core clock.
In terms of performance, the SB-1250 achieves 4400 Dhrystone MIPS (2200 Dhrystone MIPS per core) at 10-13 Watts. Dhrystone MIPS numbers were measured using the standard GCC compiler with no optimizations. In terms of available network bandwidth, the SB-1250, when running at 1GHz, achieves peak 128 Gigabits/sec of on-chip bandwidth, 50 Gigabits/sec of memory bandwidth, and 25 Gigabits/sec of total I/O bandwidth.
The SB-1250 includes a high-bandwidth expansion bus called LDT. What is LDT?
LDT stands for Lightning Data Transport, and is a high-speed I/O bus defined by AMD and a consortium of companies including networking vendors. Since LDT utilizes the PCI bus transfer protocol, LDT is very appealing to networking customers who have invested heavily in PCI-based devices, but are looking for a higher-performance option. The SB-1250, using 8-bit wide data links at 400 MHz, double data rate, can support peak bandwidth of 6.4 Gb/second in each direction or ~12 Gb/second full duplex. For more information on LDT, see the AMD LDT white paper
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