Athlon Ultra and delays
The way they were originally talking, the expectation was this one was going to show up this month. So if they are saying H1 2001, then by Sgolds Rule don't expect it until June 2001. A big delay.
But I don't think the delays being talked about are all that important, aside from the PR point of view. Well, a switch to 0.13 micron earlier would have helped the production problems, but it would have made the pricewar more intense, so it is a trade off.
While I would have liked to have seen the 760MP earlier, realistically there isn't much of a market for it until Q2 of next year anyway. If there are boards shipping in Q1 and qualified systems in Q2 it will hit it's market window. Part of the problem seems more to do with the availability of DDR, this has got to change. The 760MP has a big advantage over Intel's products, the FSB is point to point. Each processor will get a full speed path
to the chipset, Intel has that path being shared. Even the Profusion(TM) chipset has up to 4 Xeons sharing the same 100MHz FSB.
I am not convinced that the Athlon Ultra will show any difference from 256k/512k L2 cache Palominos. The combination of 128k of L1, an exclusive L2 cache and a point to point FSB tends to water down any advantage a very large cache may provide for x86 architectures. In addition, the large caches will likely limit the upper speed of the chip.
Now the delay that pains me the most is the switch to 0.13 micron. The biggest downside is that there won't be any production increase over the growth in the number of wafer starts. The speed increase doesn't appear to be a problem, AMD appears to be competitive, if only by exploiting the gap between the PIII and the P4. Since the P4 is constrained by the availability of DRDRAM until at least Q2 of next year, AMD will be able to set their own price within reasonable parameters.
Now the thing that makes it all worth it is SOI. It is my opinion that the expansion at Fab30 is to support this and the delay to 0.13 micron is because of it. Whether their SOI process uses implanted wafers like I originally thought, or that it is added during processing as Hans DeVries (who certainly knows more about this than I do) suggests, is not a big deal. Assuming that IBM's experience is relevant to the process being developed by Motorola/AMD, then there should be at least a 30% increase in clock rate seen. Since this SOI process seems to take some pains in insulating the "wires" in low-k dielectric material, then the increase in clock rate headroom may be greater, the power consumption lower, or both. Now AMD may field SOI at 0.18 design rules, Motorola is planning to do that, but AMD may wait until 0.13 micron is ready. So we could see SOI chips from AMD by Q2/Q3 of 2001. Definitely by Q4. For what it is worth, Motorola seems to have gotten the G4 up to the GHz range with SOI and other changes, they were originally at a 0.55GHz max.
The bottom line is that AMD's roadmap has taken some twists and turns. There have been some delays and eliminations, no large cache Slot1 processors, DDR is later than hoped, SMP chipset about a year late, large cache Mustangs delayed or killed, 0.15 micron dead, 0.13 micron delayed, Palomino and Morgan at least later than hoped, and 1.5GHz delayed a quarter. But AMD is still more than competitive, their production is increasing on schedule (wish it were faster, but...), they are still in line for important market windows and we have a commitment to a new, very powerful technology, SOI. It looks like ClawHammer will be here before SledgeHammer (seems to be a very expected change), and will likely be in volumes higher than originally thought for SledgeHammer.
"The future's so bright, I gotta wear shades." |
