SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 203.76-1.1%Nov 21 3:59 PM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Charles R who wrote (19079)11/15/2000 10:22:40 AM
From: jcholewaRead Replies (2) of 275872
 
> Note that Quake takes advantage of SSE, not SSE2. Also, specfp's optimizations are mostly or all SSE (prefetch stuff).>

> Are you sure? I find it unlikely that P4 FP can outperform P3 unless SSE2 optimizations are in place.
> Where do you get this info? My understanding is that all P4 FPU related stuff were being heavily tweaked
> with SSE2 optimizations for launch.

P4 stands to benefit FAR MORE than PIII with prefetch instructions. The whole point of prefetch is that it leverages memory bandwidth to improve effective memory latency. Da-da, da-daaaaaaa! Pentium 4's platform has far better bandwidth than PIII's platform, so liberal use of prefetch won't choke up P4's memory subsystem like it would on PIII.

Add to that the fact that specfp is one of the most memory bandwidth constrained benchmarks out there (slight embellishment). Quake is a similar case, though not quite as extreme.

    -JC
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext