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Technology Stocks : Advanced Micro Devices - Moderated (AMD)
AMD 259.65+2.3%Jan 23 9:30 AM EST
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To: pgerassi who wrote (21393)12/4/2000 1:04:41 AM
From: Mani1Read Replies (1) of 275872
 
Pete, I am not going to nitpick your numbers, but even if I use your 5.7 degree delta T for the wafer, that would only be only 10% of the overall resistance.

If ambient is 25 C and the maximum die temp (not junction) is 95 C, then 5.7/(95-25) is only 8%. Iosonic advertises a 40% reduction in thermal conductivity which leads to a 3% reduction of the overall resistance.

I think the whole model is based on very localized hot spots, here is a quote from isonics.com

Q. How does a thin layer of silicon-28 with higher thermal conductivity affect the temperature in a microprocessor when the heat must diffuse through the bulk silicon wafer, which is much thicker?

A. The average temperature of the chip will probably not be affected.However, the very localized temperatures at the p/n junction of a transistor can be greatly affected.

It says elsewhere This area comprises only 1-2% of the area of the silicon chip and localized temperatures can exceed 150oC

I suppose if you make the hot spots localized enough, you could come up with their numbers.

I think Iosonic is just a company desperate for funding and is trying to get some publicity. I doubt anything will come out of it for at least 5 years.

Mani
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