Tenchusatsu,
The AMDroids are all hopeful for a Sledgehammer featuring dual cores, large L2 cache, and integrated LDT north bridge. No doubt this bad boy will be one huge chip to fab, even on 0.13u.
It will be bigger than average, but let's count: 2 cores at about 75 mm^2, (most likely including 128K L1) + L2 of 50 mm^2 + northbridge of about 20 mm^2. All on .13u. It adds up to 220 mm^2.
It's partially a WAG, since I don't know the sizes of L2 and Northbridge on .13u. It's based on AMD statement that Clawhammer should be about the size of Duron.
The northbridge chips are normally done on trailing edge process and still end up being pin-count limited (too big because of too many pins). That restriction will be gone with integrated Northbridge, as well as a lot of functionality for communication between CPU and Northbridge in a traditional CPUs, which will just go away.
Sledgehammer is a very ambitious project, but if delivered on time, it should make AMD extremely competitive with any other high end CPU vendor, with advantage of x86 compatibility.
Joe
PS: if you had a magic wand and could replace Intel roadmap with AMD roadmap, would you do it? It seems to me that P4 and Itanium are just 2 shots in the dark, compared to a safe, conventional AMD roadmap. |
