First, my apologes for being redundant. I have not had the time to read back far enough into this thread.
Your assessment on the timeframe, for the most part, is accurate. The technology will be definitely required below 0.10u but it is of great benefit above that threshold. We may choose to disagree on this point but my opinion will not be changed. A great majority of the killer defects on IC wafers are either from equipment/process issues (uniformity, cleanliness of equipment, etal) or the cleaning process. I have in my possession, a very recent paper that is in the process of being published relative to CFMT that proves to me any improvements made to existing cleaning processes will positively impact the bottom line. This is very important given the competitive nature of the IC business and the volumes of wafers run. It is cost effective to implement new enabling cleaning technologies now on those processes that suffer from clean induced defect density issues. Some people still have not caught on that residual moisture, films, particles, etal that remain on the wafers affect subsequent processes. Many people look for surface particles on their wafers using either a TNCR or KLAC defect inspection tool. They look for specific particulate defects but have not been too worried about the "haze" category. This "Haze" may impact future oxidation processes causing uniformity issues as well as growth issues.
I believe it will take 6 months to qualify a new tool or process once it comes on line within an existing fab. The new cleaning technologies are superior to the old wet cleaning processes. So in this respect, I disagree with the 3-5 year timeframe. This will be a fast track implementation since it will yield a huge cost benefit. After all, cleaning is one of the most redundant IC processes (close to 30 or more times) there are. A slight yield improvement is multiplied by a factor of 30. Off hand, the next best comparision is with the exposure tools which are only used 12-18 times per wafer proceesed. This adds up real fast. We have created new careers in the IC manufacturing world. MOT had them for quite a long time and others have caught on. They are called Contamination Control Engineers or Clean Engineers. The most positive performance impacts will undoubtedly come from here for existing and futre processes. The new cleaning equipment and processes are retrofittable to existing Fabs so I expect to see significant moves occurring in this area.
Polaris is finally about to take off, IMO. It has been years in the making but finally they may be getting off the dime here. Heck, my company, known for NOT being leading edge, has finally booked their first order for this system.
Keep in mind, you are being given one man's opinion or two cents worth. I work within the industry as a IC Manufacturing Engineer. I am the closest thing you can get to the end user since I am the end user.
I am opinionated from the technical and functional side with 20 years behind me. It doesn't make me an expert, but pretty close to it.<ggg>
Regards
Andrew |
