United States Patent 6,160,739
Wong Dec. 12, 2000
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Non-volatile memories with improved endurance and extended lifetime
Abstract
Non-volatile memory cells in a sector of a memory array are selectively erased only when it is determined that the selected memory cells require erasing. A memory cell is selectively erased by applying two non-zero erase voltages to the cell, where the combination of the two erase voltages generates an electric field sufficient to induce Fowler-Nordheim tunneling and erase the cell. Memory cells not selected for erasing, either in the same sector or other sectors, have only one or none of the two erase voltages applied, which is insufficient to erase the unselected memory cells is a result, endurance of the non-volatile memory cells is improved because the memory cells are not subjected to repeated unnecessary erasing and programming operations.
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Inventors: Wong; Sau C. (Hillsborough, CA).
Assignee: SanDisk Corporation (Sunnyvale, CA).
Appl. No.: 293,133
Filed: Apr. 16, 1999
Intl. Cl. : G11C 16/04
Current U.S. Cl.: 365/185.29; 365/185.33
Field of Search: 365/185.29, 185.33, 185.27, 185.18
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References Cited | [Referenced By]
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U.S. Patent Documents
5,047,981 Sept., 1991 Gill et al. 365/185.18
5,341,342 Aug., 1994 Brahmbhatt 365/185.3
5,777,923 Jul., 1998 Lee et al. 365/185.11
Foreign Patent Documents
226054A Jul., 1994 TW
WO9749086 Dec., 1997 WO
Primary Examiner: Le; Vu A.
Attorney, Agent or Firm: Majestic, Parsons, Siebert & Hsue
10 Claims, 6 Drawing Figures |
