AMCC Shrinks Sonet Equipment
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AMCC Shrinks Sonet Equipment
January 08, 2001
Applied Micro Circuits Corp. (Nasdaq: AMCC) today announced
a new silicon chip that promises to bring relief to carriers that are rapidly running out of space to house equipment (see AMCC Unveils New Framer ).
The new chip, called Orinoco, promises to shrink the size of Sonet/SDH equipment by orders of magnitude. It does the work of more than a dozen of today’s chips -- enabling an end-to-end, copper-to-optics OC48 (2.5 Gbit/s) Sonet system to occupy a single circuit board rather than an entire rackful of equipment, as is currently the case.
Orinoco also promises to help equipment manufacturers speed up development times because they’ll be able to buy a ready-made chip rather than having to develop their own subsystems.
Orinoco takes 12 DS3 (45 Mbit/s) or E3 (34 Mbit/s) channels and aggregates them onto a single OC12 (622 Mbit/s) Sonet/SDH channel. This process is called framing.
However, framing circuits only account for about 20 percent of the real estate on the Orinoco chip. The rest of the space is devoted to so-called mapping circuits that reduce or eliminate timing errors such as jitter and wander -- in short, making sure everything stays synchronous. Timing errors are mostly caused by the fact that DS3s run at a different clock speed from STS1s -- the basic unit of Sonet -- which has a clock speed of 51.84 Mbit/s.
"We had many customers using our Nile chip [a DS3-to-OC12 framer] with external PLLs [phase-locked loops] to smooth the DS3 clock [take out the timing errors]," says Amit Banerjee, a senior marketing manager at AMCC. "These customers were asking us if we could eliminate the need for costly, hard-to-design-with PLLs."
Banerjee won't say how long it took AMCC's engineers to meet that challenge. However, integrating both analog (PLL circuits) and digital (framing) functions on the same chip was a major hurdle, he says. "It's relatively easy to design a chip with one or two PLLs on it -- people do it," he notes. But 12 PLLs, one per DS3 or E3, is a different matter, because the software design tools have to handle an incredibly complex and time-consuming simulation. Mixing analog and digital technologies on the same chip is also challenging -- all the more so because design engineers from different disciplines have to work together, Banerjee says.
According to Banerjee, Orinoco has been sampling for several months. One of the customers testing it out is Cyras Systems Inc., which is being acquired by Ciena Corp. (Nasdaq: CIEN - message board) (see Ciena To Buy Cyras for $2.6 Billion ).
"Integrating these PLLs onto a single chip to meet jitter and wander specifications for mapping DS3s into Sonet is a commendable achievement," says Sunil Tomar, Cyras's VP of engineering. The Orinoco could be the not-so-secret weapon that will help Cyras make its multiservice provisioning platform, the K2, the smallest on the market (see Cyras: The Next Cerent? ).
AMCC must be hoping that today's Orinoco announcement will put some pep back into its share price, which took a battering last Friday (see Market Pain Returns ).
-- Pauline Rigby, senior editor, Light Reading
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