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Technology Stocks : Intel Corporation (INTC)

INTC 37.51

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Dec 15 3:59 PM EST

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To: Scumbria who wrote (124838)	1/13/2001 10:53:45 AM
From: Elmer	Read Replies (2) of 186894

Re: "One of the main problems with P4 is the small single ported L1 cache. This is not the result of a lack of transistors, but rather the decision made to access the cache in two cycles. Athlon uses a large three cycle dual-ported L1 cache, which I believe is far more sensible. I suspect that P4 is permanently crippled because of this decision" You're wrong again. You seem to think Intel simply made a decision and then decided to wait till the design was complete to see how it worked. A very thorough analysis was done on the L1 design and there would have been virtually zero benefit from a larger cache. Perhaps you guys should try simulating your architecture before you commit to it? One second thought, forget it. Just keep doing things the was you do now. EP

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