> Great. I thought Intel's P4 chipset solutions for non-Rambus were out in 2002.
>>>>>
Brookdale platforms accelerate ramp into Mainstream 1 starting Q3 ‘01
Brookdale SDRAM in Q3 ’01 provides high confidence/lowest cost solution
Brookdale DDR in Q1 ’02 enables full range of memory support
<<<<<
> Maybe my bad info, but H202 sounded good.
I think you mean "but H201 sounded good", no?
Anyway, the above quote is from November last year (y2k). Hypothetically, "01H2" could be considered a delay from "01Q3", but I think Intel is just trying to be conservative here.
The real concern is performance with an SDRAM chipset. Will this be "dual channel" SDRAM? If not, will the memory at least be asynchronous (as in 133MHz, instead of the chipset-to-cpu clock of 100MHz)? If the answer to these are "no", then there's good reason to worry. If the answer to both is yes, then this will an interesting and perhaps compelling option. If one is yes and the other no .... well, I guess we'll see. I should be doing hobby-work right now, not posting messages and stuff. :)
Incidentally, it looks like they're setting up the SDRAM chipset to precisely match the mPGA478 socket, time-wise.
-JC |
