> Bottom line: Intel's 815 chipset w/ PC133 SDRAM beats VIA's DDR chipset in most benchmarks.
> This should confirm the obvious, that Pentium III really doesn't need DDR.
My first thought was that you were saying that the Pentium III does not need to be competitive in performance compared to the competition. While I agree to some extent with this, upon reflection I believe that you are suggesting that the Pentium III has some inherency that prevents it from benefiting from higher bandwidth memory types.
[if that is what you meant, then] I do not believe that there is enough data to support your conclusion.
The tests to which you link compared PC133 SDRAM against PC2100 SDRAM. In the test, though, the PC2100 was crippled in two ways:
(A) Its bandwidth to the cpu was limited to 1.07GB/s, which is the same speed as the PC133 SDRAM can reach.
(B) The latency grade of the PC2100 SDRAM was less than that of the PC133 SDRAM used in the comparison (granted, that's largely because the CL2 PC2100 simply is not available, but your conclusion was more reflecting on potential benefit of the double data rating).
The chipset-to-cpu peak bandwidth is the limiting factor here, not the memory-to-chipset peak bandwidth. Your assertion is (well, may be) that increases in the memory-to-chipset peak bandwidth will not help the cpu, but I suggest an alternative conclusion that shows that your "obvious" conclusion is not so obvious at all: I assert that increasing both the memory-to-chipset peak bandwidth and the chipset-to-cpu peak bandwidth would allow the Pentium III to attain higher per-clock performance.
Granted, that isn't going to happen. But it doesn't mean that the P6 family cannot possibly be enhanced with high bandwidth memory.
> Pentium 4 could, however.
Depends.
One of the claimed benefits of DRDRAM is that it is much easier/cheaper to run in parallel. Needs fewer pins and all. If DDR SDRAM was brought to the Pentium 4, would it be in series (instead, I mean, of running multiple memory banks in parallel for multiple times the peak bandwidth)? If not, when what performance effect would we find? Many (perhaps the intense majority) of the benchmarks in which the P4 excels are those which can take advantage of high memory-to-cpu peak bandwidths. A move from dual PC800 banks to a single PC2100 bank would result in a drop in peak memory bandwidth from 3.20GB/s to 2.13GB/s. That's a drop of more than 30%. Sure, there are other reasons why DDR SDRAM may increase performance in some areas despite the lower bandwidth (latency and all that), but it is entirely possible that the P4's strong points would be diminished by this changeover.
-JC |
