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Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 112.07+4.0%10:40 AM EST
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To: richard surckla who wrote (64701)1/21/2001 1:23:31 PM
From: Scumbria  Read Replies (1) of 93625
 
Richard,

However, when the memory system is under higher load the answer can be quite different. When one or more
additional transactions are being serviced, factors such as bank conflicts and address bandwidth become important
issues. The higher bank count of RIMMs versus DIMMs means that the probability of bank conflicts occurring is
much lower. Therefore, the high latency and bandwidth penalties associated with bank conflicts occur far less often in
RDRAM-based systems than in SDRAM-based systems. Furthermore, as illustrated in the previous timing diagrams,
the need for 2-cycle addressing on an address bus used to specify both Row and Column addresses means that the
address bus may not be available to start a subsequent transaction in SDRAM-based memory. During periods of
higher memory utilization, when more than one request is sent to the memory controller, some memory requests
may be delayed waiting for the address bus. For these reasons, under higher loads RDRAM-based memory can be
much more efficient, achieving lower latency and higher bandwidth than SDRAM."

Nice theory. Unfortunately RDRAM memory controllers only keep 4 of the 32+ banks open, which means that there will be many fewer page hits with RDRAM.

Check out i815 vs. i820 benchmarks for some empirical evidence that the article is clueless.

Scumbria
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