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To: fingolfen who wrote (126443)2/1/2001 4:54:42 PM
From: Dan3  Read Replies (2) of 186894
 
Re: Greater software optimization will allow the P4 to rapidly outpace the performance of the K7-series and P3 series chips. AMD won't have a performance equalizer

There appears to be a serious problem with P4 - its extravagent use of memory bandwidth for a given level of performance. As Intel and VIA move closer to the release of validated SDRAM chipsets for P4, there are more hints that P4 suffers a performance hit when when memory bandwidth is limited to levels that allow PIII and Athlon to provide nearly full performance. This makes sense when you consider that P4 must use hardware prefetch to avoid stalls in its extraordinarily long (28 stages for code!)pipeline.

Hardware prefetch works by doing a number of unrequested memory reads whenever a programmatic memory read is made. Sometimes, this results in data being brought into the P4's cache before it is needed, which avoids a stall in the long pipeline and lets P4 at 1.5GHZ run about as well as PIII / Athlon at 1GHZ. But it achieves this performance parity only if it can be provided with much more memory bandwidth than is needed by PIII / Athlon.

As clock speeds increase and even PIII / Athlon need the higher bandwidth provided by DDR or dual channel rambus, P4 will have nowhere to go - it requires 3.2GB/sec memory to achieve the performance of PIII / Athlon on 1.1GB/sec PC133. Due to its extreme demands on memory bandwidth, the P4 architecture may hit a brick wall as clock speeds increase. Adding a second memory channel to a motherboard generally adds about $100 to the cost of that board. P4 already needs two channels to equal the performance of a 1GHZ PIII / Athlon. P4 looks like a dead end.

Dan
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